drm/amdkfd: Send MES packets on correct XCC on GFX 12.1

Send the Set_Shader_Debugger packet on the correct MES pipe when
partition mode is set to non-SPX mode.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Michael Chen <michael.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mukul Joshi 2025-08-07 15:18:00 -04:00 committed by Alex Deucher
parent b6ac64eed8
commit b78ec282bb
2 changed files with 6 additions and 3 deletions

View File

@ -371,8 +371,10 @@ int kfd_dbg_set_mes_debug_mode(struct kfd_process_device *pdd, bool sq_trap_en)
memset(pdd->proc_ctx_cpu_ptr, 0, AMDGPU_MES_PROC_CTX_SIZE);
}
return amdgpu_mes_set_shader_debugger(pdd->dev->adev, pdd->proc_ctx_gpu_addr, spi_dbg_cntl,
pdd->watch_points, flags, sq_trap_en, 0);
return amdgpu_mes_set_shader_debugger(pdd->dev->adev,
pdd->proc_ctx_gpu_addr, spi_dbg_cntl,
pdd->watch_points, flags, sq_trap_en,
ffs(pdd->dev->xcc_mask) - 1);
}
#define KFD_DEBUGGER_INVALID_WATCH_POINT_ID -1

View File

@ -94,7 +94,8 @@ void kfd_process_dequeue_from_device(struct kfd_process_device *pdd)
if (dev->kfd->shared_resources.enable_mes && !!pdd->proc_ctx_gpu_addr &&
down_read_trylock(&dev->adev->reset_domain->sem)) {
amdgpu_mes_flush_shader_debugger(dev->adev,
pdd->proc_ctx_gpu_addr, 0);
pdd->proc_ctx_gpu_addr,
ffs(pdd->dev->xcc_mask) - 1);
up_read(&dev->adev->reset_domain->sem);
}
pdd->already_dequeued = true;