From 3b9c088aeabf6f1d0e92baa4359fc166fbb0050e Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Wed, 29 Apr 2026 18:00:23 +0800 Subject: [PATCH 1/5] ASoC: fsl-asoc-card: enable dpcm_merged_chan flag for ASRC frontend When using ASRC in DPCM mode, the backend DAI (codec) may have channel constraints that differ from the frontend. For example, the ASRC can support 1-8 channels, but the codec might only support stereo (2 channels). Without dpcm_merged_chan, userspace can open the frontend with unsupported channel counts, leading to errors when the backend is configured. Enable dpcm_merged_chan to merge backend channel constraints to the frontend, ensuring userspace only sees valid channel configurations. This fixes issues where applications attempt to use channel counts that the backend codec doesn't support. Signed-off-by: Shengjiu Wang Link: https://patch.msgid.link/20260429100028.2739711-2-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl-asoc-card.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c index 70a6159430ed..41cd2fc2ea56 100644 --- a/sound/soc/fsl/fsl-asoc-card.c +++ b/sound/soc/fsl/fsl-asoc-card.c @@ -989,6 +989,7 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) if (asrc_pdev) { /* DPCM DAI Links only if ASRC exists */ + priv->dai_link[1].dpcm_merged_chan = 1; priv->dai_link[1].cpus->of_node = asrc_np; priv->dai_link[1].platforms->of_node = asrc_np; for_each_link_codecs((&(priv->dai_link[2])), codec_idx, codec_comp) { From d611feb52de8c0d599487d98a6dd3bbb86e20c60 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Wed, 29 Apr 2026 18:00:24 +0800 Subject: [PATCH 2/5] ASoC: fsl-asoc-card: enable ignore_pmdown_time for ASRC case MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Problem: When switching from ASRC path (hw:0,1) to direct path (hw:0,0), audio stops after 5 seconds due to DAPM powering down shared widgets. Scenario: 1. Play on hw:0,1 (ASRC): ASRC-Playback → CPU-Playback → Codec 2. Stop playback 3. Play on hw:0,0 (Direct): CPU-Playback → Codec 4. After 5s: No sound (DAPM powered down CPU-Playback) Root Cause: DAPM sees ASRC-Playback disconnected and powers down the entire path including CPU-Playback, even though CPU-Playback is still needed for the direct path. Solution: Enable ignore_pmdown_time for DPCM links to prevent premature widget power-down when switching between paths. Signed-off-by: Shengjiu Wang Link: https://patch.msgid.link/20260429100028.2739711-3-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl-asoc-card.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c index 41cd2fc2ea56..e08e135886f7 100644 --- a/sound/soc/fsl/fsl-asoc-card.c +++ b/sound/soc/fsl/fsl-asoc-card.c @@ -990,6 +990,7 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) if (asrc_pdev) { /* DPCM DAI Links only if ASRC exists */ priv->dai_link[1].dpcm_merged_chan = 1; + priv->dai_link[1].ignore_pmdown_time = 1; priv->dai_link[1].cpus->of_node = asrc_np; priv->dai_link[1].platforms->of_node = asrc_np; for_each_link_codecs((&(priv->dai_link[2])), codec_idx, codec_comp) { @@ -999,6 +1000,7 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) } priv->dai_link[2].cpus->of_node = cpu_np; priv->dai_link[2].dai_fmt = priv->dai_fmt; + priv->dai_link[2].ignore_pmdown_time = 1; priv->card.num_links = 3; ret = of_property_read_u32(asrc_np, "fsl,asrc-rate", From e78abe395d30e8be8effc538e6983e27aa289602 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Wed, 29 Apr 2026 18:00:25 +0800 Subject: [PATCH 3/5] ASoC: fsl-asoc-card: add channel and rate constraints for CS42888 The CS42888 codec has 4 I2S lanes with 2 channels per lane. Using odd channel counts (3, 5, 7) causes data misalignment in the I2S frame, resulting in incorrect channel mapping. Only mono and even channel counts (1, 2, 4, 6, 8) work correctly. Additionally, the fixed system clock on i.MX platforms limits supported sample rates. With 12.288 MHz MCLK, only 48kHz family rates (48k, 96k, 192k) achieve valid MCLK:LRCK ratios. With 11.2896 MHz MCLK, only 44k family rates are supported. Add a startup callback to apply PCM constraints for both channels and rates, preventing userspace from requesting unsupported configurations. Signed-off-by: Shengjiu Wang Link: https://patch.msgid.link/20260429100028.2739711-4-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl-asoc-card.c | 71 +++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c index e08e135886f7..90414ac10032 100644 --- a/sound/soc/fsl/fsl-asoc-card.c +++ b/sound/soc/fsl/fsl-asoc-card.c @@ -40,6 +40,33 @@ /* Default DAI format without Master and Slave flag */ #define DAI_FMT_BASE (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF) +static const u32 cs42888_rates_48k[] = { + 48000, 96000, 192000, +}; + +static const u32 cs42888_rates_44k[] = { + 44100, 88200, 176400, +}; + +static const u32 cs42888_channels[] = { + 1, 2, 4, 6, 8, +}; + +static const struct snd_pcm_hw_constraint_list cs42888_rate_48k_constraints = { + .list = cs42888_rates_48k, + .count = ARRAY_SIZE(cs42888_rates_48k), +}; + +static const struct snd_pcm_hw_constraint_list cs42888_rate_44k_constraints = { + .list = cs42888_rates_44k, + .count = ARRAY_SIZE(cs42888_rates_44k), +}; + +static const struct snd_pcm_hw_constraint_list cs42888_channel_constraints = { + .list = cs42888_channels, + .count = ARRAY_SIZE(cs42888_channels), +}; + /** * struct codec_priv - CODEC private data * @mclk: Main clock of the CODEC @@ -87,6 +114,8 @@ struct cpu_priv { * @codec_priv: CODEC private data * @cpu_priv: CPU private data * @card: ASoC card structure + * @constraint_rates: array of supported rates + * @constraint_channels: array of supported channels * @streams: Mask of current active streams * @sample_rate: Current sample rate * @sample_format: Current sample format @@ -104,6 +133,8 @@ struct fsl_asoc_card_priv { struct codec_priv codec_priv[2]; struct cpu_priv cpu_priv; struct snd_soc_card card; + const struct snd_pcm_hw_constraint_list *constraint_rates; + const struct snd_pcm_hw_constraint_list *constraint_channels; u8 streams; u32 sample_rate; snd_pcm_format_t sample_format; @@ -291,7 +322,39 @@ static int fsl_asoc_card_hw_free(struct snd_pcm_substream *substream) return 0; } +static int fsl_asoc_card_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct fsl_asoc_card_priv *priv = snd_soc_card_get_drvdata(rtd->card); + struct snd_pcm_runtime *runtime = substream->runtime; + int ret; + + if (priv->constraint_channels) { + ret = snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_CHANNELS, + priv->constraint_channels); + if (ret) + return ret; + } + + /* + * Apply rate constraints only to frontend DAI links (no_pcm = 0). + * Skip DPCM backend (no_pcm = 1) as rate is fixed by be_hw_params_fixup() + * and ASRC frontend handles rate conversion. + */ + if (priv->constraint_rates && !rtd->dai_link->no_pcm) { + ret = snd_pcm_hw_constraint_list(runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + priv->constraint_rates); + if (ret) + return ret; + } + + return 0; +} + static const struct snd_soc_ops fsl_asoc_card_ops = { + .startup = fsl_asoc_card_startup, .hw_params = fsl_asoc_card_hw_params, .hw_free = fsl_asoc_card_hw_free, }; @@ -753,6 +816,14 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) priv->cpu_priv.sysclk_dir[RX] = SND_SOC_CLOCK_OUT; priv->cpu_priv.slot_width = 32; priv->dai_fmt |= SND_SOC_DAIFMT_CBC_CFC; + priv->constraint_channels = &cs42888_channel_constraints; + if (priv->codec_priv[0].mclk_freq % 12288000 == 0) + priv->constraint_rates = &cs42888_rate_48k_constraints; + else if (priv->codec_priv[0].mclk_freq % 11289600 == 0) + priv->constraint_rates = &cs42888_rate_44k_constraints; + else + dev_warn(&pdev->dev, "Unknown MCLK frequency %lu, no rate constraints\n", + priv->codec_priv[0].mclk_freq); } else if (of_device_is_compatible(np, "fsl,imx-audio-cs427x")) { codec_dai_name[0] = "cs4271-hifi"; priv->codec_priv[0].mclk_id = CS427x_SYSCLK_MCLK; From fa7d8ea56c58f1de3f0db7f53d9aae27a9c64a60 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Wed, 29 Apr 2026 18:00:26 +0800 Subject: [PATCH 4/5] ASoC: fsl-asoc-card: exclude S20_3LE format for WM8960/WM8962 + SAI MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit S20_3LE format cannot be used with WM8960/WM8962 codecs when paired with SAI, due to two distinct BCLK generation limitations: 1. Codec Master Mode: When WM8960/WM8962 generates BCLK, it cannot produce the exact 1.92 MHz required for S20_3LE at 48kHz stereo (48000 × 2 × 20). The codec uses fixed dividers from SYSCLK (12.288 MHz), and the required divider (6.4) is not available. The closest divider is 6, producing 2.048 MHz, which causes right channel corruption. 2. SAI Master Mode: SAI derive BCLK from MCLK using integer dividers only. S20_3LE requires non-integer divider ratios with standard MCLK frequencies. For example, 48kHz stereo needs 1.920 MHz BCLK, which requires a divider of 6.4 from 12.288 MHz MCLK (not an integer). Exclude S20_3LE format for WM8960/WM8962 when used with SAI to prevent these issues. Users should use S16_LE, S24_LE, or S32_LE instead. Signed-off-by: Shengjiu Wang Link: https://patch.msgid.link/20260429100028.2739711-5-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl-asoc-card.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c index 90414ac10032..44083d15f6e5 100644 --- a/sound/soc/fsl/fsl-asoc-card.c +++ b/sound/soc/fsl/fsl-asoc-card.c @@ -122,6 +122,7 @@ struct cpu_priv { * @asrc_rate: ASRC sample rate used by Back-Ends * @asrc_format: ASRC sample format used by Back-Ends * @dai_fmt: DAI format between CPU and CODEC + * @exclude_format: excluded format; * @name: Card name */ @@ -141,6 +142,7 @@ struct fsl_asoc_card_priv { u32 asrc_rate; snd_pcm_format_t asrc_format; u32 dai_fmt; + u64 exclude_format; char name[32]; }; @@ -329,6 +331,14 @@ static int fsl_asoc_card_startup(struct snd_pcm_substream *substream) struct snd_pcm_runtime *runtime = substream->runtime; int ret; + if (priv->exclude_format && !rtd->dai_link->no_pcm) { + ret = snd_pcm_hw_constraint_mask64(runtime, + SNDRV_PCM_HW_PARAM_FORMAT, + ~priv->exclude_format); + if (ret) + return ret; + } + if (priv->constraint_channels) { ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, @@ -850,11 +860,30 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) priv->codec_priv[0].fll_id = WM8962_SYSCLK_FLL; priv->codec_priv[0].pll_id = WM8962_FLL; priv->dai_fmt |= SND_SOC_DAIFMT_CBP_CFP; + /* + * WM8962 has same BCLK generation limitations as WM8960. + * See WM8960 section for detailed explanation. + */ + if (of_node_name_eq(cpu_np, "sai")) + priv->exclude_format = SNDRV_PCM_FMTBIT_S20_3LE; } else if (of_device_is_compatible(np, "fsl,imx-audio-wm8960")) { codec_dai_name[0] = "wm8960-hifi"; priv->codec_priv[0].fll_id = WM8960_SYSCLK_AUTO; priv->codec_priv[0].pll_id = WM8960_SYSCLK_AUTO; priv->dai_fmt |= SND_SOC_DAIFMT_CBP_CFP; + /* + * WM8960 in master mode cannot generate exact 1.92 MHz BCLK + * required for S20_3LE (48kHz × 2ch × 20bit). Closest available + * is 2.048 MHz (SYSCLK/6), which causes right channel corruption. + * + * In SAI master mode, SAI derive BCLK from MCLK using integer + * dividers only. S20_3LE requires non-integer divider ratios + * with standard MCLK frequencies. For example, 48kHz stereo + * needs 1.920 MHz BCLK, which requires a divider of 6.4 from + * 12.288 MHz MCLK (not an integer). + */ + if (of_node_name_eq(cpu_np, "sai")) + priv->exclude_format = SNDRV_PCM_FMTBIT_S20_3LE; } else if (of_device_is_compatible(np, "fsl,imx-audio-ac97")) { codec_dai_name[0] = "ac97-hifi"; priv->dai_fmt = SND_SOC_DAIFMT_AC97; From 99b5316f08f390a5e1ea2239ecca8e2b4ef70ac6 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Wed, 29 Apr 2026 18:00:27 +0800 Subject: [PATCH 5/5] ASoC: fsl-asoc-card: reduce WM8904 PLL ratio to meet frequency limit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit WM8904 has a 27 MHz PLL frequency limit. The current S24_LE PLL ratio of 384 exceeds this at high sample rates (96 kHz × 384 = 36.864 MHz). Reduce the ratio to 192 for WM8904, keeping PLL within limits at all supported rates (96 kHz × 192 = 18.432 MHz). Add codec-specific pll_ratio_s24 field, default 384, override to 192 for WM8904. Signed-off-by: Shengjiu Wang Link: https://patch.msgid.link/20260429100028.2739711-6-shengjiu.wang@nxp.com Signed-off-by: Mark Brown --- sound/soc/fsl/fsl-asoc-card.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c index 44083d15f6e5..709543308fe9 100644 --- a/sound/soc/fsl/fsl-asoc-card.c +++ b/sound/soc/fsl/fsl-asoc-card.c @@ -75,6 +75,9 @@ static const struct snd_pcm_hw_constraint_list cs42888_channel_constraints = { * @mclk_id: MCLK (or main clock) id for set_sysclk() * @fll_id: FLL (or secordary clock) id for set_sysclk() * @pll_id: PLL id for set_pll() + * @pll_ratio_s24: PLL output ratio for S24_LE format (PLL_freq = sample_rate × ratio) + * Default is 384, but some codecs (e.g., WM8904) require lower values + * to stay within PLL frequency limits */ struct codec_priv { struct clk *mclk; @@ -83,6 +86,7 @@ struct codec_priv { u32 mclk_id; int fll_id; int pll_id; + int pll_ratio_s24; }; /** @@ -255,7 +259,7 @@ static int fsl_asoc_card_hw_params(struct snd_pcm_substream *substream, if (codec_priv->pll_id >= 0 && codec_priv->fll_id >= 0) { if (priv->sample_format == SNDRV_PCM_FORMAT_S24_LE) - pll_out = priv->sample_rate * 384; + pll_out = priv->sample_rate * codec_priv->pll_ratio_s24; else pll_out = priv->sample_rate * 256; @@ -815,6 +819,7 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) for (codec_idx = 0; codec_idx < 2; codec_idx++) { priv->codec_priv[codec_idx].fll_id = -1; priv->codec_priv[codec_idx].pll_id = -1; + priv->codec_priv[codec_idx].pll_ratio_s24 = 384; } /* Diversify the card configurations */ @@ -935,6 +940,7 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) priv->codec_priv[0].mclk_id = WM8904_FLL_MCLK; priv->codec_priv[0].fll_id = WM8904_CLK_FLL; priv->codec_priv[0].pll_id = WM8904_FLL_MCLK; + priv->codec_priv[0].pll_ratio_s24 = 192; priv->dai_fmt |= SND_SOC_DAIFMT_CBP_CFP; } else if (of_device_is_compatible(np, "fsl,imx-audio-spdif")) { ret = fsl_asoc_card_spdif_init(codec_np, cpu_np, codec_dai_name, priv);