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mtd: rawnand: davinci: Do not use extra dereferencing
When the nand_chip structure is already available, there is no need to dereference it through the info pointer. Use the chip pointer directly in this case. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20201113124045.32743-1-miquel.raynal@bootlin.com
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@ -586,10 +586,10 @@ static int davinci_nand_attach_chip(struct nand_chip *chip)
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return PTR_ERR(pdata);
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/* Use board-specific ECC config */
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info->chip.ecc.engine_type = pdata->engine_type;
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info->chip.ecc.placement = pdata->ecc_placement;
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chip->ecc.engine_type = pdata->engine_type;
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chip->ecc.placement = pdata->ecc_placement;
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switch (info->chip.ecc.engine_type) {
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switch (chip->ecc.engine_type) {
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case NAND_ECC_ENGINE_TYPE_NONE:
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pdata->ecc_bits = 0;
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break;
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@ -601,7 +601,7 @@ static int davinci_nand_attach_chip(struct nand_chip *chip)
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* NAND_ECC_ALGO_HAMMING to avoid adding an extra ->ecc_algo
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* field to davinci_nand_pdata.
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*/
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info->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
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chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
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break;
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case NAND_ECC_ENGINE_TYPE_ON_HOST:
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if (pdata->ecc_bits == 4) {
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@ -628,12 +628,12 @@ static int davinci_nand_attach_chip(struct nand_chip *chip)
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if (ret == -EBUSY)
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return ret;
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info->chip.ecc.calculate = nand_davinci_calculate_4bit;
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info->chip.ecc.correct = nand_davinci_correct_4bit;
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info->chip.ecc.hwctl = nand_davinci_hwctl_4bit;
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info->chip.ecc.bytes = 10;
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info->chip.ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
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info->chip.ecc.algo = NAND_ECC_ALGO_BCH;
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chip->ecc.calculate = nand_davinci_calculate_4bit;
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chip->ecc.correct = nand_davinci_correct_4bit;
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chip->ecc.hwctl = nand_davinci_hwctl_4bit;
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chip->ecc.bytes = 10;
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chip->ecc.options = NAND_ECC_GENERIC_ERASED_CHECK;
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chip->ecc.algo = NAND_ECC_ALGO_BCH;
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/*
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* Update ECC layout if needed ... for 1-bit HW ECC, the
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@ -651,20 +651,20 @@ static int davinci_nand_attach_chip(struct nand_chip *chip)
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} else if (chunks == 4 || chunks == 8) {
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mtd_set_ooblayout(mtd,
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nand_get_large_page_ooblayout());
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info->chip.ecc.read_page = nand_davinci_read_page_hwecc_oob_first;
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chip->ecc.read_page = nand_davinci_read_page_hwecc_oob_first;
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} else {
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return -EIO;
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}
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} else {
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/* 1bit ecc hamming */
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info->chip.ecc.calculate = nand_davinci_calculate_1bit;
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info->chip.ecc.correct = nand_davinci_correct_1bit;
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info->chip.ecc.hwctl = nand_davinci_hwctl_1bit;
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info->chip.ecc.bytes = 3;
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info->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
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chip->ecc.calculate = nand_davinci_calculate_1bit;
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chip->ecc.correct = nand_davinci_correct_1bit;
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chip->ecc.hwctl = nand_davinci_hwctl_1bit;
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chip->ecc.bytes = 3;
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chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
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}
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info->chip.ecc.size = 512;
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info->chip.ecc.strength = pdata->ecc_bits;
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chip->ecc.size = 512;
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chip->ecc.strength = pdata->ecc_bits;
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break;
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default:
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return -EINVAL;
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@ -899,7 +899,7 @@ static int nand_davinci_remove(struct platform_device *pdev)
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int ret;
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spin_lock_irq(&davinci_nand_lock);
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if (info->chip.ecc.placement == NAND_ECC_PLACEMENT_INTERLEAVED)
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if (chip->ecc.placement == NAND_ECC_PLACEMENT_INTERLEAVED)
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ecc4_busy = false;
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spin_unlock_irq(&davinci_nand_lock);
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