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drm/amdgpu: fix the nullptr issue as for PWR IP not existing in discovery table

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Fixes: c1cf79ca5c ("drm/amdgpu: use IP discovery table for renoir")

This nullptr issue should be specific on the Renoir series during try access the PWR_MISC_CNTL_STATUS
when PWR IP not been detected by discovery table. Moreover the PWR IP not existing in Renoir series is
expected therefore just avoid access PWR register in Renoir series.

Signed-off-by: Prike.Liang <Prike.Liang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Prike.Liang 2020-06-05 17:53:56 +08:00 committed by Alex Deucher
parent 5a84ae87fe
commit b6df946ef4
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
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@ -2856,8 +2856,8 @@ static void gfx_v9_0_init_gfx_power_gating(struct amdgpu_device *adev)
/* program GRBM_REG_SAVE_GFX_IDLE_THRESHOLD to 0x55f0 */
data |= (0x55f0 << RLC_AUTO_PG_CTRL__GRBM_REG_SAVE_GFX_IDLE_THRESHOLD__SHIFT);
WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_AUTO_PG_CTRL), data);
pwr_10_0_gfxip_control_over_cgpg(adev, true);
if (adev->asic_type != CHIP_RENOIR)
pwr_10_0_gfxip_control_over_cgpg(adev, true);
}
}