drm/amdgpu: add amdgpu.ptl module parameter for PTL control

Add a new kernel module parameter 'amdgpu.ptl' to allow
users to enable or disable PTL feature at driver loading time.

Parameter values:
  *) 0 or -1: disable PTL (default)
  *) 1: enable PTL
  *) 2: permanently disable PTL

Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Perry Yuan 2026-02-09 00:42:10 +08:00 committed by Alex Deucher
parent 950688d241
commit b6dc8f7536
5 changed files with 54 additions and 1 deletions

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@ -267,6 +267,7 @@ extern int amdgpu_rebar;
extern int amdgpu_wbrf;
extern int amdgpu_user_queue;
extern int amdgpu_ptl;
extern uint amdgpu_hdmi_hpd_debounce_delay_ms;

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@ -246,6 +246,7 @@ int amdgpu_umsch_mm_fwlog;
int amdgpu_rebar = -1; /* auto */
int amdgpu_user_queue = -1;
uint amdgpu_hdmi_hpd_debounce_delay_ms;
int amdgpu_ptl = -1; /* auto */
DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
"DRM_UT_CORE",
@ -1112,6 +1113,18 @@ module_param_named(user_queue, amdgpu_user_queue, int, 0444);
MODULE_PARM_DESC(hdmi_hpd_debounce_delay_ms, "HDMI HPD disconnect debounce delay in milliseconds (0 to disable (by default), 1500 is common)");
module_param_named(hdmi_hpd_debounce_delay_ms, amdgpu_hdmi_hpd_debounce_delay_ms, uint, 0644);
/**
* DOC: ptl (int)
* Enable PTL feature at boot time. Possible values:
*
* - -1 = auto (ASIC specific default)
* - 0 = disable PTL (default)
* - 1 = enable PTL
* - 2 = permanently disable PTL (cannot be re-enabled at runtime)
*/
MODULE_PARM_DESC(ptl, "Enable PTL (-1 = auto, 0 = disable (default), 1 = enable, 2 = permanently disable)");
module_param_named(ptl, amdgpu_ptl, int, 0444);
/* These devices are not supported by amdgpu.
* They are supported by the mach64, r128, radeon drivers
*/

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@ -1300,6 +1300,9 @@ int amdgpu_ptl_perf_monitor_ctrl(struct amdgpu_device *adev, u32 req_code,
psp = &adev->psp;
ptl = &psp->ptl;
if (ptl->permanently_disabled && *ptl_state == 1)
return 0;
if (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 4) ||
psp->sos.fw_version < 0x0036081a)
return -EOPNOTSUPP;
@ -1386,6 +1389,12 @@ static ssize_t ptl_enable_store(struct device *dev,
return -EINVAL;
}
/* Block enable when permanently disabled */
if (ptl->permanently_disabled) {
mutex_unlock(&ptl->mutex);
return -EPERM;
}
fmt1 = ptl->fmt1;
fmt2 = ptl->fmt2;
ptl_state = enable ? 1 : 0;
@ -1417,6 +1426,9 @@ static ssize_t ptl_enable_show(struct device *dev, struct device_attribute *attr
struct amdgpu_device *adev = drm_to_adev(ddev);
struct amdgpu_ptl *ptl = &adev->psp.ptl;
if (ptl->permanently_disabled)
return sysfs_emit(buf, "permanently disabled\n");
return sysfs_emit(buf, "%s\n", ptl->enabled ? "enabled" : "disabled");
}

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@ -2405,6 +2405,32 @@ static int gfx_v9_4_3_perf_monitor_ptl_init(struct amdgpu_device *adev, bool ena
return 0;
}
static int gfx_v9_4_3_ptl_hw_init(struct amdgpu_device *adev)
{
struct amdgpu_ptl *ptl = &adev->psp.ptl;
bool enable;
switch (amdgpu_ptl) {
case 1:
enable = true;
break;
case 2:
/* Permanently disabled - cannot be re-enabled */
enable = false;
ptl->permanently_disabled = true;
break;
case -1:
case 0:
default:
enable = false;
break;
}
gfx_v9_4_3_perf_monitor_ptl_init(adev, enable ? 1 : 0);
return 0;
}
static int gfx_v9_4_3_hw_fini(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = ip_block->adev;
@ -2587,7 +2613,7 @@ static int gfx_v9_4_3_late_init(struct amdgpu_ip_block *ip_block)
adev->gfx.ras->enable_watchdog_timer)
adev->gfx.ras->enable_watchdog_timer(adev);
gfx_v9_4_3_perf_monitor_ptl_init(adev, true);
gfx_v9_4_3_ptl_hw_init(adev);
return 0;
}

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@ -44,6 +44,7 @@ struct amdgpu_ptl {
enum amdgpu_ptl_fmt fmt2;
bool enabled;
bool hw_supported;
bool permanently_disabled;
/* PTL disable reference counting */
atomic_t disable_ref;
struct mutex mutex;