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ASoC: renesas: msiof: tidyup to remove each errors
Merge series from Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>: Current Renesas MSIOF driver might get some errors. This patch-set try to reduce/remove them.
This commit is contained in:
Mark Brown
commit
b6b5bbad57
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@ -7,7 +7,7 @@
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//
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/*
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* [NOTE]
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* [NOTE-CLOCK-MODE]
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*
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* This driver doesn't support Clock/Frame Provider Mode
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*
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@ -24,12 +24,64 @@
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* Clock/Frame Consumer Mode.
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*/
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/*
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* [NOTE-RESET]
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*
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* MSIOF has TXRST/RXRST to reset FIFO, but it shouldn't be used during SYNC signal was asserted,
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* because it will be cause of HW issue.
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*
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* When MSIOF is used as Sound driver, this driver is assuming it is used as clock consumer mode
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* (= Codec is clock provider). This means, it can't control SYNC signal by itself.
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*
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* We need to use SW reset (= reset_control_xxx()) instead of TXRST/RXRST.
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*/
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/*
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* [NOTE-BOTH-SETTING]
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*
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* SITMDRn / SIRMDRn and some other registers should not be updated during working even though it
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* was not related the target direction (for example, do TX settings during RX is working),
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* otherwise it cause a FSERR.
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*
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* Setup both direction (Playback/Capture) in the same time.
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*/
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/*
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* [NOTE-R/L]
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*
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* The data of Captured might be R/L opposite.
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*
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* This driver is assuming MSIOF is used as Clock/Frame Consumer Mode, and there is a case that some
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* Codec (= Clock/Frame Provider) might output Clock/Frame before setup MSIOF. It depends on Codec
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* driver implementation.
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*
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* MSIOF will capture data without checking SYNC signal Hi/Low (= R/L).
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*
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* This means, if MSIOF RXE bit was set as 1 in case of SYNC signal was Hi (= R) timing, it will
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* start capture data since next SYNC low singla (= L). Because Linux assumes sound data is lined
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* up as R->L->R->L->..., the data R/L will be opposite.
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*
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* The only solution in this case is start CLK/SYNC *after* MSIOF settings, but it depends when and
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* how Codec driver start it.
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*/
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/*
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* [NOTE-FSERR]
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*
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* We can't remove all FSERR.
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*
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* Renesas have tried to minimize the occurrence of FSERR errors as much as possible, but
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* unfortunately we cannot remove them completely, because MSIOF might setup its register during
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* CLK/SYNC are inputed. It can be happen because MSIOF is working as Clock/Frame Consumer.
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*/
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_dma.h>
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#include <linux/of_graph.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <linux/spi/sh_msiof.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/soc.h>
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@ -60,10 +112,13 @@
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struct msiof_priv {
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struct device *dev;
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struct snd_pcm_substream *substream[SNDRV_PCM_STREAM_LAST + 1];
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struct reset_control *reset;
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spinlock_t lock;
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void __iomem *base;
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resource_size_t phy_addr;
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int count;
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/* for error */
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int err_syc[SNDRV_PCM_STREAM_LAST + 1];
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int err_ovf[SNDRV_PCM_STREAM_LAST + 1];
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@ -121,7 +176,7 @@ static int msiof_hw_start(struct snd_soc_component *component,
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/*
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* see
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* [NOTE] on top of this driver
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* [NOTE-CLOCK-MODE] on top of this driver
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*/
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/*
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* see
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@ -131,42 +186,63 @@ static int msiof_hw_start(struct snd_soc_component *component,
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* RX: Fig 109.15
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*/
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/* reset errors */
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priv->err_syc[substream->stream] =
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/*
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* Use reset_control_xx() instead of TXRST/RXRST.
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* see
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* [NOTE-RESET]
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*/
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if (!priv->count)
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reset_control_deassert(priv->reset);
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priv->count++;
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/*
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* Reset errors. ignore 1st FSERR
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*
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* see
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* [NOTE-FSERR]
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*/
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priv->err_syc[substream->stream] = -1;
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priv->err_ovf[substream->stream] =
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priv->err_udf[substream->stream] = 0;
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/* Start DMAC */
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snd_dmaengine_pcm_trigger(substream, cmd);
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/*
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* setup both direction (Playback/Capture) in the same time.
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* see
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* above [NOTE-BOTH-SETTING]
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*/
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/* SITMDRx */
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if (is_play) {
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val = SITMDR1_PCON |
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FIELD_PREP(SIMDR1_SYNCMD, SIMDR1_SYNCMD_LR) |
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SIMDR1_SYNCAC | SIMDR1_XXSTP;
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if (msiof_flag_has(priv, MSIOF_FLAGS_NEED_DELAY))
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val |= FIELD_PREP(SIMDR1_DTDL, 1);
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val = SITMDR1_PCON | SIMDR1_SYNCAC | SIMDR1_XXSTP |
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FIELD_PREP(SIMDR1_SYNCMD, SIMDR1_SYNCMD_LR);
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if (msiof_flag_has(priv, MSIOF_FLAGS_NEED_DELAY))
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val |= FIELD_PREP(SIMDR1_DTDL, 1);
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msiof_write(priv, SITMDR1, val);
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msiof_write(priv, SITMDR1, val);
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val = FIELD_PREP(SIMDR2_BITLEN1, width - 1);
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msiof_write(priv, SITMDR2, val | FIELD_PREP(SIMDR2_GRP, 1));
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msiof_write(priv, SITMDR3, val);
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val = FIELD_PREP(SIMDR2_BITLEN1, width - 1);
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msiof_write(priv, SITMDR2, val | FIELD_PREP(SIMDR2_GRP, 1));
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msiof_write(priv, SITMDR3, val);
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}
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/* SIRMDRx */
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else {
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val = FIELD_PREP(SIMDR1_SYNCMD, SIMDR1_SYNCMD_LR) |
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SIMDR1_SYNCAC;
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if (msiof_flag_has(priv, MSIOF_FLAGS_NEED_DELAY))
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val |= FIELD_PREP(SIMDR1_DTDL, 1);
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val = SIMDR1_SYNCAC |
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FIELD_PREP(SIMDR1_SYNCMD, SIMDR1_SYNCMD_LR);
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if (msiof_flag_has(priv, MSIOF_FLAGS_NEED_DELAY))
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val |= FIELD_PREP(SIMDR1_DTDL, 1);
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msiof_write(priv, SIRMDR1, val);
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msiof_write(priv, SIRMDR1, val);
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val = FIELD_PREP(SIMDR2_BITLEN1, width - 1);
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msiof_write(priv, SIRMDR2, val | FIELD_PREP(SIMDR2_GRP, 1));
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msiof_write(priv, SIRMDR3, val);
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}
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val = FIELD_PREP(SIMDR2_BITLEN1, width - 1);
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msiof_write(priv, SIRMDR2, val | FIELD_PREP(SIMDR2_GRP, 1));
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msiof_write(priv, SIRMDR3, val);
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/* SIFCTR */
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msiof_write(priv, SIFCTR,
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FIELD_PREP(SIFCTR_TFWM, SIFCTR_TFWM_1) |
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FIELD_PREP(SIFCTR_RFWM, SIFCTR_RFWM_1));
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/* SIIER */
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if (is_play)
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@ -183,10 +259,11 @@ static int msiof_hw_start(struct snd_soc_component *component,
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msiof_update(priv, SISTR, val, val);
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/* SICTR */
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val = SICTR_TEDG | SICTR_REDG;
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if (is_play)
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val = SICTR_TXE | SICTR_TEDG;
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val |= SICTR_TXE;
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else
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val = SICTR_RXE | SICTR_REDG;
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val |= SICTR_RXE;
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msiof_update_and_wait(priv, SICTR, val, val, val);
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return 0;
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@ -207,9 +284,6 @@ static int msiof_hw_stop(struct snd_soc_component *component,
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val = SIIER_RDREQE | SIIER_RDMAE | SISTR_ERR_RX;
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msiof_update(priv, SIIER, val, 0);
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/* Stop DMAC */
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snd_dmaengine_pcm_trigger(substream, cmd);
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/* SICTR */
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if (is_play)
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val = SICTR_TXE;
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@ -217,6 +291,18 @@ static int msiof_hw_stop(struct snd_soc_component *component,
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val = SICTR_RXE;
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msiof_update_and_wait(priv, SICTR, val, 0, 0);
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/* Stop DMAC */
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snd_dmaengine_pcm_trigger(substream, cmd);
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/*
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* Ignore 1st FSERR
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*
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* see
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* [NOTE-FSERR]
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*/
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if (priv->err_syc[substream->stream] < 0)
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priv->err_syc[substream->stream] = 0;
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/* indicate error status if exist */
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if (priv->err_syc[substream->stream] ||
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priv->err_ovf[substream->stream] ||
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@ -227,6 +313,11 @@ static int msiof_hw_stop(struct snd_soc_component *component,
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priv->err_ovf[substream->stream],
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priv->err_udf[substream->stream]);
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priv->count--;
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if (!priv->count)
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reset_control_assert(priv->reset);
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return 0;
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}
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@ -302,6 +393,9 @@ static struct snd_soc_dai_driver msiof_dai_driver = {
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.channels_max = 2,
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},
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.ops = &msiof_dai_ops,
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.symmetric_rate = 1,
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.symmetric_channels = 1,
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.symmetric_sample_bits = 1,
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};
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static struct snd_pcm_hardware msiof_pcm_hardware = {
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@ -490,12 +584,19 @@ static int msiof_probe(struct platform_device *pdev)
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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priv->reset = devm_reset_control_get_exclusive(dev, NULL);
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if (IS_ERR(priv->reset))
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return PTR_ERR(priv->reset);
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reset_control_assert(priv->reset);
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ret = devm_request_irq(dev, irq, msiof_interrupt, 0, dev_name(dev), priv);
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if (ret)
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return ret;
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priv->dev = dev;
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priv->phy_addr = res->start;
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priv->count = 0;
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spin_lock_init(&priv->lock);
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platform_set_drvdata(pdev, priv);
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