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ARM: dts: aspeed: yosemite4: Revise address of i2c-mux for two fan boards

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Change the address of the I2C mux for two fan boards to 0x74
according to schematic.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20241003074251.3818101-7-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
This commit is contained in:
Ricky CX Wu 2024-10-03 15:42:47 +08:00 committed by Andrew Jeffery
parent b1a1ecb669
commit b64d50e401
1 changed files with 108 additions and 106 deletions
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214
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
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@ -32,6 +32,8 @@ aliases {
i2c27 = &imux27;
i2c28 = &imux28;
i2c29 = &imux29;
i2c30 = &imux30;
i2c31 = &imux31;
i2c34 = &imux34;
i2c35 = &imux35;
};
@ -1034,6 +1036,8 @@ ipmb@10 {
};
&i2c14 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
bus-frequency = <400000>;
adc@1d {
@ -1094,112 +1098,6 @@ eeprom@51 {
reg = <0x51>;
};
i2c-mux@71 {
compatible = "nxp,pca9846";
#address-cells = <1>;
#size-cells = <0>;
idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x71>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
adc@1f {
compatible = "ti,adc128d818";
reg = <0x1f>;
ti,mode = /bits/ 8 <2>;
};
pwm@20{
compatible = "maxim,max31790";
reg = <0x20>;
};
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
pwm@23{
compatible = "maxim,max31790";
reg = <0x23>;
};
adc@33 {
compatible = "maxim,max11615";
reg = <0x33>;
};
eeprom@52 {
compatible = "atmel,24c128";
reg = <0x52>;
};
gpio@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
adc@1f {
compatible = "ti,adc128d818";
reg = <0x1f>;
ti,mode = /bits/ 8 <2>;
};
pwm@20{
compatible = "maxim,max31790";
reg = <0x20>;
};
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
pwm@23{
compatible = "maxim,max31790";
reg = <0x23>;
};
adc@33 {
compatible = "maxim,max11615";
reg = <0x33>;
};
eeprom@52 {
compatible = "atmel,24c128";
reg = <0x52>;
};
gpio@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
};
};
};
i2c-mux@73 {
compatible = "nxp,pca9544";
#address-cells = <1>;
@ -1231,6 +1129,110 @@ adc@35 {
};
};
};
i2c-mux@74 {
compatible = "nxp,pca9546";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect;
imux30: i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
adc@1f {
compatible = "ti,adc128d818";
reg = <0x1f>;
ti,mode = /bits/ 8 <2>;
};
pwm@20{
compatible = "maxim,max31790";
reg = <0x20>;
};
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
pwm@23{
compatible = "maxim,max31790";
reg = <0x23>;
};
adc@33 {
compatible = "maxim,max11615";
reg = <0x33>;
};
eeprom@52 {
compatible = "atmel,24c128";
reg = <0x52>;
};
gpio@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
};
};
imux31: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
adc@1f {
compatible = "ti,adc128d818";
reg = <0x1f>;
ti,mode = /bits/ 8 <2>;
};
pwm@20{
compatible = "maxim,max31790";
reg = <0x20>;
};
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
pwm@23{
compatible = "maxim,max31790";
reg = <0x23>;
};
adc@33 {
compatible = "maxim,max11615";
reg = <0x33>;
};
eeprom@52 {
compatible = "atmel,24c128";
reg = <0x52>;
};
gpio@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
};
};
};
};
&i2c15 {