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perf vendor events intel: Update westmereex events to v4

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Update westmereex events from v3 to v4 fixing a spelling issue.

Signed-off-by: Ian Rogers <irogers@google.com>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Zhengjun Xing <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20231026003149.3287633-7-irogers@google.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
This commit is contained in:
Ian Rogers 2023-10-25 17:31:47 -07:00 committed by Namhyung Kim
parent 247730767c
commit b629208161
2 changed files with 2 additions and 2 deletions
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2
tools/perf/pmu-events/arch/x86/mapfile.csv
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@ -35,7 +35,7 @@ GenuineIntel-6-86,v1.21,snowridgex,core
GenuineIntel-6-8[CD],v1.13,tigerlake,core
GenuineIntel-6-2C,v5,westmereep-dp,core
GenuineIntel-6-25,v4,westmereep-sp,core
GenuineIntel-6-2F,v3,westmereex,core
GenuineIntel-6-2F,v4,westmereex,core
AuthenticAMD-23-([12][0-9A-F]|[0-9A-F]),v2,amdzen1,core
AuthenticAMD-23-[[:xdigit:]]+,v1,amdzen2,core
AuthenticAMD-25-([245][[:xdigit:]]|[[:xdigit:]]),v1,amdzen3,core

1 Family-model Version Filename EventType
35 GenuineIntel-6-8[CD] v1.13 tigerlake core
36 GenuineIntel-6-2C v5 westmereep-dp core
37 GenuineIntel-6-25 v4 westmereep-sp core
38 GenuineIntel-6-2F v3 v4 westmereex core
39 AuthenticAMD-23-([12][0-9A-F]|[0-9A-F]) v2 amdzen1 core
40 AuthenticAMD-23-[[:xdigit:]]+ v1 amdzen2 core
41 AuthenticAMD-25-([245][[:xdigit:]]|[[:xdigit:]]) v1 amdzen3 core

2
tools/perf/pmu-events/arch/x86/westmereex/pipeline.json
View File

@ -45,7 +45,7 @@
"UMask": "0x1"
},
{
"BriefDescription": "Early Branch Prediciton Unit clears",
"BriefDescription": "Early Branch Prediction Unit clears",
"EventCode": "0xE8",
"EventName": "BPU_CLEARS.EARLY",
"SampleAfterValue": "2000000",