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qiommu/arm-smmu-v3: Remove iommu_ops pgsize_bitmap
The driver never reads this value, arm_smmu_domain_finalise() always sets domain.pgsize_bitmap to pgtbl_cfg, which comes from the per-smmu calculated value. Remove the ops version entirely, the related dead code and make arm_smmu_ops const. Reviewed-by: Kevin Tian <kevin.tian@intel.com> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Link: https://lore.kernel.org/r/1-v2-68a2e1ba507c+1fb-iommu_rm_ops_pgsize_jgg@nvidia.com Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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@ -38,7 +38,7 @@ module_param(disable_msipolling, bool, 0444);
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MODULE_PARM_DESC(disable_msipolling,
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"Disable MSI-based polling for CMD_SYNC completion.");
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static struct iommu_ops arm_smmu_ops;
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static const struct iommu_ops arm_smmu_ops;
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static struct iommu_dirty_ops arm_smmu_dirty_ops;
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enum arm_smmu_msi_index {
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@ -3674,7 +3674,7 @@ static int arm_smmu_def_domain_type(struct device *dev)
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return 0;
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}
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static struct iommu_ops arm_smmu_ops = {
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static const struct iommu_ops arm_smmu_ops = {
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.identity_domain = &arm_smmu_identity_domain,
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.blocked_domain = &arm_smmu_blocked_domain,
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.capable = arm_smmu_capable,
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@ -3690,7 +3690,6 @@ static struct iommu_ops arm_smmu_ops = {
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.def_domain_type = arm_smmu_def_domain_type,
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.viommu_alloc = arm_vsmmu_alloc,
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.user_pasid_table = 1,
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.pgsize_bitmap = -1UL, /* Restricted during device attach */
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.owner = THIS_MODULE,
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.default_domain_ops = &(const struct iommu_domain_ops) {
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.attach_dev = arm_smmu_attach_dev,
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@ -4504,11 +4503,6 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
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smmu->oas = 48;
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}
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if (arm_smmu_ops.pgsize_bitmap == -1UL)
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arm_smmu_ops.pgsize_bitmap = smmu->pgsize_bitmap;
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else
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arm_smmu_ops.pgsize_bitmap |= smmu->pgsize_bitmap;
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/* Set the DMA mask for our table walker */
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if (dma_set_mask_and_coherent(smmu->dev, DMA_BIT_MASK(smmu->oas)))
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dev_warn(smmu->dev,
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