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ARM: OMAP2+: Drop legacy platform data for dra7 l4_cfg
We can now probe interconnects with simple-pm-bus and genpd. Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -79,27 +79,6 @@ static struct omap_hwmod dra7xx_l3_main_2_hwmod = {
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},
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};
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/*
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* 'l4' class
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* instance(s): l4_cfg
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*/
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static struct omap_hwmod_class dra7xx_l4_hwmod_class = {
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.name = "l4",
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};
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/* l4_cfg */
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static struct omap_hwmod dra7xx_l4_cfg_hwmod = {
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.name = "l4_cfg",
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.class = &dra7xx_l4_hwmod_class,
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.clkdm_name = "l4cfg_clkdm",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = DRA7XX_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET,
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.context_offs = DRA7XX_RM_L4CFG_L4_CFG_CONTEXT_OFFSET,
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},
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},
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};
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/*
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* 'bb2d' class
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*
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@ -175,14 +154,6 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_2__l3_instr = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> l3_main_1 */
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static struct omap_hwmod_ocp_if dra7xx_l4_cfg__l3_main_1 = {
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.master = &dra7xx_l4_cfg_hwmod,
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.slave = &dra7xx_l3_main_1_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> l3_main_2 */
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static struct omap_hwmod_ocp_if dra7xx_l3_main_1__l3_main_2 = {
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.master = &dra7xx_l3_main_1_hwmod,
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@ -191,22 +162,6 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__l3_main_2 = {
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.user = OCP_USER_MPU,
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};
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/* l4_cfg -> l3_main_2 */
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static struct omap_hwmod_ocp_if dra7xx_l4_cfg__l3_main_2 = {
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.master = &dra7xx_l4_cfg_hwmod,
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.slave = &dra7xx_l3_main_2_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> l4_cfg */
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static struct omap_hwmod_ocp_if dra7xx_l3_main_1__l4_cfg = {
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.master = &dra7xx_l3_main_1_hwmod,
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.slave = &dra7xx_l4_cfg_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_1 -> bb2d */
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static struct omap_hwmod_ocp_if dra7xx_l3_main_1__bb2d = {
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.master = &dra7xx_l3_main_1_hwmod,
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@ -233,10 +188,7 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__vcp2 = {
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static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
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&dra7xx_l3_main_2__l3_instr,
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&dra7xx_l4_cfg__l3_main_1,
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&dra7xx_l3_main_1__l3_main_2,
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&dra7xx_l4_cfg__l3_main_2,
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&dra7xx_l3_main_1__l4_cfg,
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&dra7xx_l3_main_1__bb2d,
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&dra7xx_l3_main_1__vcp1,
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&dra7xx_l3_main_1__vcp2,
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