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ASoC: cs42l51: Update to use maple tree register cache

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The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.

Update the cs42l51 driver to use the more modern data structure.

Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230713-asoc-cirrus-maple-v1-5-a62651831735@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Mark Brown 2023-07-13 01:13:18 +01:00
parent faa48c9bda
commit b5a0e5e4bf
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1 changed files with 1 additions and 1 deletions
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2
sound/soc/codecs/cs42l51.c
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@ -703,7 +703,7 @@ const struct regmap_config cs42l51_regmap = {
.volatile_reg = cs42l51_volatile_reg,
.writeable_reg = cs42l51_writeable_reg,
.max_register = CS42L51_CHARGE_FREQ,
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_MAPLE,
};
EXPORT_SYMBOL_GPL(cs42l51_regmap);