staging: sm750fb: Clean up whitespace and comment spacing in headers

Clean up minor formatting inconsistencies in sm750.h and sm750_accel.h:
- Remove a redundant consecutive blank line in sm750.h.
- Add missing spaces in comment blocks in sm750.h and sm750_accel.h.
- Align DE_SOURCE_X_K1_MONO_MASK macro definition in sm750_accel.h with
  spaces instead of tabs to match surrounding macros.

Signed-off-by: Mohit Mishra <mishraloopmohit@gmail.com>
Link: https://patch.msgid.link/20260722175817.213235-2-mishraloopmohit@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mohit Mishra 2026-07-22 23:28:17 +05:30 committed by Greg Kroah-Hartman
parent 96ea99e3f9
commit b538a611d2
2 changed files with 5 additions and 6 deletions

View File

@ -39,7 +39,6 @@ enum sm750_path {
sm750_pnc = 3, /* panel and crt */
};
struct lynx_accel {
/* base virtual address of DPR registers */
unsigned char __iomem *dpr_base;
@ -49,7 +48,7 @@ struct lynx_accel {
/* function pointers */
void (*de_init)(struct lynx_accel *accel);
int (*de_wait)(void);/* see if hardware ready to work */
int (*de_wait)(void); /* see if hardware ready to work */
int (*de_fillrect)(struct lynx_accel *accel,
u32 base, u32 pitch, u32 bpp,

View File

@ -5,16 +5,16 @@
#define HW_ROP2_COPY 0xc
#define HW_ROP2_XOR 0x6
/* notes: below address are the offset value from de_base_address (0x100000)*/
/* notes: below address are the offset value from de_base_address (0x100000) */
/* for sm718/750/502 de_base is at mmreg_1mb*/
/* for sm718/750/502 de_base is at mmreg_1mb */
#define DE_BASE_ADDR_TYPE1 0x100000
/* for sm712,de_base is at mmreg_32kb */
#define DE_BASE_ADDR_TYPE2 0x8000
/* for sm722,de_base is at mmreg_0 */
#define DE_BASE_ADDR_TYPE3 0
/* type1 data port address is at mmreg_0x110000*/
/* type1 data port address is at mmreg_0x110000 */
#define DE_PORT_ADDR_TYPE1 0x110000
/* for sm712,data port address is at mmreg_0 */
#define DE_PORT_ADDR_TYPE2 0x100000
@ -25,7 +25,7 @@
#define DE_SOURCE_WRAP BIT(31)
#define DE_SOURCE_X_K1_SHIFT 16
#define DE_SOURCE_X_K1_MASK (0x3fff << 16)
#define DE_SOURCE_X_K1_MONO_MASK (0x1f << 16)
#define DE_SOURCE_X_K1_MONO_MASK (0x1f << 16)
#define DE_SOURCE_Y_K2_MASK 0xffff
#define DE_DESTINATION 0x4