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clk: rockchip: rk3368: Add clock id for tsp

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Change-Id: I79a423f93f991aab43922e58ce34eac1754304e2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This commit is contained in:
Finley Xiao 2018-02-01 20:12:35 +08:00 committed by Tao Huang
parent 5f049afc2c
commit b503ff5697
2 changed files with 4 additions and 2 deletions
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4
drivers/clk/rockchip/clk-rk3368.c
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@ -428,10 +428,10 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
GATE(SCLK_I2S_2CH, "sclk_i2s_2ch", "i2s_2ch_pre", CLK_SET_RATE_PARENT,
RK3368_CLKGATE_CON(5), 15, GFLAGS),
COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
COMPOSITE(SCLK_TSP, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
RK3368_CLKSEL_CON(46), 6, 2, MFLAGS, 0, 5, DFLAGS,
RK3368_CLKGATE_CON(6), 12, GFLAGS),
GATE(0, "sclk_hsadc_tsp", "ext_hsadc_tsp", 0,
GATE(SCLK_HSADC_TSP, "sclk_hsadc_tsp", "ext_hsadc_tsp", 0,
RK3368_CLKGATE_CON(13), 7, GFLAGS),
MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0,

2
include/dt-bindings/clock/rk3368-cru.h
View File

@ -92,6 +92,8 @@
#define SCLK_TIMER14 137
#define SCLK_TIMER15 138
#define SCLK_DDRCLK 139
#define SCLK_TSP 140
#define SCLK_HSADC_TSP 141
#define DCLK_VOP 190
#define MCLK_CRYPTO 191