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drm/i915: Remove i915_reg.h from intel_display_power_well.c
Make intel_display_power_well.c free from including i915_reg.h. v3: Separate bit field for VLV (Ville) v2: Include specific pcode header, drop common header (Jani) Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/20260205094341.1882816-19-uma.shankar@intel.com
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@ -8,7 +8,6 @@
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#include <drm/drm_print.h>
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#include <drm/intel/intel_pcode_regs.h>
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#include "i915_reg.h"
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#include "intel_backlight_regs.h"
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#include "intel_combo_phy.h"
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#include "intel_combo_phy_regs.h"
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@ -1277,7 +1276,7 @@ static void vlv_init_display_clock_gating(struct intel_display *display)
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* Disable trickle feed and enable pnd deadline calculation
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*/
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intel_de_write(display, MI_ARB_VLV,
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MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
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MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE_VLV);
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intel_de_write(display, CBR1_VLV, 0);
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drm_WARN_ON(display->drm, DISPLAY_RUNTIME_INFO(display)->rawclk_freq == 0);
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@ -350,6 +350,7 @@
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#define FW_CSPWRDWNEN (1 << 15)
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#define MI_ARB_VLV _MMIO(VLV_DISPLAY_BASE + 0x6504)
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#define MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE_VLV (1 << 2)
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#define CZCLK_CDCLK_FREQ_RATIO _MMIO(VLV_DISPLAY_BASE + 0x6508)
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#define CDCLK_FREQ_SHIFT 4
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