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iommu/amd: Add support for nest parent domain allocation
To support nested translation, the nest parent domain is allocated with IOMMU_HWPT_ALLOC_NEST_PARENT flag, and stores information of the v1 page table for stage 2 (i.e. GPA->SPA). Also, only support nest parent domain on AMD system, which can support the Guest CR3 Table (GCR3TRPMode) feature. This feature is required in order to program DTE[GCR3 Table Root Pointer] with the GPA. Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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@ -2769,6 +2769,14 @@ static struct iommu_domain *amd_iommu_domain_alloc_paging_v2(struct device *dev,
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return &domain->domain;
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}
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static inline bool is_nest_parent_supported(u32 flags)
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{
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/* Only allow nest parent when these features are supported */
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return check_feature(FEATURE_GT) &&
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check_feature(FEATURE_GIOSUP) &&
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check_feature2(FEATURE_GCR3TRPMODE);
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}
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static struct iommu_domain *
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amd_iommu_domain_alloc_paging_flags(struct device *dev, u32 flags,
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const struct iommu_user_data *user_data)
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@ -2776,16 +2784,28 @@ amd_iommu_domain_alloc_paging_flags(struct device *dev, u32 flags,
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{
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struct amd_iommu *iommu = get_amd_iommu_from_dev(dev);
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const u32 supported_flags = IOMMU_HWPT_ALLOC_DIRTY_TRACKING |
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IOMMU_HWPT_ALLOC_PASID;
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IOMMU_HWPT_ALLOC_PASID |
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IOMMU_HWPT_ALLOC_NEST_PARENT;
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if ((flags & ~supported_flags) || user_data)
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return ERR_PTR(-EOPNOTSUPP);
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switch (flags & supported_flags) {
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case IOMMU_HWPT_ALLOC_DIRTY_TRACKING:
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/* Allocate domain with v1 page table for dirty tracking */
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if (!amd_iommu_hd_support(iommu))
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case IOMMU_HWPT_ALLOC_NEST_PARENT:
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case IOMMU_HWPT_ALLOC_DIRTY_TRACKING | IOMMU_HWPT_ALLOC_NEST_PARENT:
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/*
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* Allocate domain with v1 page table for dirty tracking
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* and/or Nest parent.
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*/
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if ((flags & IOMMU_HWPT_ALLOC_DIRTY_TRACKING) &&
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!amd_iommu_hd_support(iommu))
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break;
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if ((flags & IOMMU_HWPT_ALLOC_NEST_PARENT) &&
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!is_nest_parent_supported(flags))
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break;
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return amd_iommu_domain_alloc_paging_v1(dev, flags);
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case IOMMU_HWPT_ALLOC_PASID:
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/* Allocate domain with v2 page table if IOMMU supports PASID. */
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