From 613fb0c8bd49df4fb28bca89aa5363856487096f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 15:33:19 +0200 Subject: [PATCH 1/6] arm64: dts: socionext: uniphier-ld20: Add default PCI interrup controller address cells Add missing address-cells 0 to the PCI interrupt node to silence W=1 warning: uniphier-ld20.dtsi:941.4-944.29: Warning (interrupt_map): /soc@0/pcie@66000000:interrupt-map: Missing property '#address-cells' in node /soc@0/pcie@66000000/legacy-interrupt-controller, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Reviewed-by: Kunihiko Hayashi Link: https://lore.kernel.org/r/20250822133318.312232-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 335093da6573..875b93856a64 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -947,6 +947,7 @@ pcie: pcie@66000000 { pcie_intc: legacy-interrupt-controller { interrupt-controller; + #address-cells = <0>; #interrupt-cells = <1>; interrupt-parent = <&gic>; interrupts = ; From a29bf0b10a1a7f51afb91c1ff9edd73b0ca1fd18 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 15:33:20 +0200 Subject: [PATCH 2/6] arm64: dts: socionext: uniphier-pxs3: Add default PCI interrup controller address cells Add missing address-cells 0 to the PCI interrupt node to silence W=1 warning: uniphier-pxs3.dtsi:915.4-918.29: Warning (interrupt_map): /soc@0/pcie@66000000:interrupt-map: Missing property '#address-cells' in node /soc@0/pcie@66000000/legacy-interrupt-controller, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Reviewed-by: Kunihiko Hayashi Link: https://lore.kernel.org/r/20250822133318.312232-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index d6e3cc6fdb25..4d6c3c2dbea6 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -921,6 +921,7 @@ pcie: pcie@66000000 { pcie_intc: legacy-interrupt-controller { interrupt-controller; + #address-cells = <0>; #interrupt-cells = <1>; interrupt-parent = <&gic>; interrupts = ; From d5cb16361f89e7f60da76c7e9e32c72c49db3e82 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 15:34:17 +0200 Subject: [PATCH 3/6] arm64: dts: apm: storm: Add default GIC address cells Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: apm-storm.dtsi:636.4-639.42: Warning (interrupt_map): /soc/pcie@1f2b0000:interrupt-map: Missing property '#address-cells' in node /interrupt-controller@78010000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Link: https://lore.kernel.org/r/20250822133416.312544-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/apm/apm-storm.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index 872093b05ce1..1b9588f7536c 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -103,6 +103,7 @@ xgene_L2_3: l2-cache-3 { gic: interrupt-controller@78010000 { compatible = "arm,cortex-a15-gic"; + #address-cells = <0>; #interrupt-cells = <3>; interrupt-controller; reg = <0x0 0x78010000 0x0 0x1000>, /* GIC Dist */ From b32a24f21283fbc86922006cc7d19fd23f70b8b8 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 15:34:24 +0200 Subject: [PATCH 4/6] arm64: dts: amazon: alpine-v2: Add default GIC address cells Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: alpine-v2.dtsi:138.4-139.33: Warning (interrupt_map): /soc/pci@fbc00000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@f0200000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Link: https://lore.kernel.org/r/20250822133423.312621-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/amazon/alpine-v2.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi index 5a72f0b64247..f49209fddbbb 100644 --- a/arch/arm64/boot/dts/amazon/alpine-v2.dtsi +++ b/arch/arm64/boot/dts/amazon/alpine-v2.dtsi @@ -123,6 +123,7 @@ gic: interrupt-controller@f0200000 { <0x0 0xf0120000 0x0 0x2000>; /* GICH */ interrupts = ; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <3>; }; From 3d1963e503d752ba33446ad056435c687f6d8d83 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 15:34:25 +0200 Subject: [PATCH 5/6] arm64: dts: amazon: alpine-v3: Add default GIC address cells Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: alpine-v3.dtsi:342.4-349.33: Warning (interrupt_map): /soc/pcie@fbd00000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@f0800000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Link: https://lore.kernel.org/r/20250822133423.312621-4-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/amazon/alpine-v3.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi index dea60d136c2e..bd35e0e9d0ab 100644 --- a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi +++ b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi @@ -320,6 +320,7 @@ soc { gic: interrupt-controller@f0800000 { compatible = "arm,gic-v3"; + #address-cells = <0>; #interrupt-cells = <3>; interrupt-controller; reg = <0x0 0xf0800000 0 0x10000>, /* GICD */ From 7ee0f223cabe9b9384250024fec577c731cbcf72 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 15:33:41 +0200 Subject: [PATCH 6/6] arm64: dts: toshiba: tmpv7708: Add default GIC address cells Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: tmpv7708.dtsi:503.4-507.28: Warning (interrupt_map): /soc/pcie@28400000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@24001000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Reviewed-by: Nobuhiro Iwamatsu Link: https://lore.kernel.org/r/20250822133340.312380-2-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 39806f0ae513..9aa7b1872bd6 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -152,6 +152,7 @@ soc { gic: interrupt-controller@24001000 { compatible = "arm,gic-400"; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <3>; interrupts = ; reg = <0 0x24001000 0 0x1000>,