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arm64: dts: rockchip: add rk3588 cache level information

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Add missing, mandatory cache-level information for RK3588.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230317174102.61209-1-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Sebastian Reichel 2023-03-17 18:41:02 +01:00 committed by Heiko Stuebner
parent 78aedee18a
commit b37115b653
1 changed files with 9 additions and 0 deletions
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9
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@ -222,6 +222,7 @@ l2_cache_l0: l2-cache-l0 {
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -230,6 +231,7 @@ l2_cache_l1: l2-cache-l1 {
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -238,6 +240,7 @@ l2_cache_l2: l2-cache-l2 {
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -246,6 +249,7 @@ l2_cache_l3: l2-cache-l3 {
cache-size = <131072>;
cache-line-size = <64>;
cache-sets = <512>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -254,6 +258,7 @@ l2_cache_b0: l2-cache-b0 {
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -262,6 +267,7 @@ l2_cache_b1: l2-cache-b1 {
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -270,6 +276,7 @@ l2_cache_b2: l2-cache-b2 {
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -278,6 +285,7 @@ l2_cache_b3: l2-cache-b3 {
cache-size = <524288>;
cache-line-size = <64>;
cache-sets = <1024>;
cache-level = <2>;
next-level-cache = <&l3_cache>;
};
@ -286,6 +294,7 @@ l3_cache: l3-cache {
cache-size = <3145728>;
cache-line-size = <64>;
cache-sets = <4096>;
cache-level = <3>;
};
};