github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-27 00:22:00 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

riscv: traps_misaligned: properly sign extend value in misaligned load handler

Browse Source 
Add missing cast to signed long.

Signed-off-by: Andreas Schwab <schwab@suse.de>
Fixes: 956d705dd2 ("riscv: Unaligned load/store handling for M_MODE")
Tested-by: Clément Léger <cleger@rivosinc.com>
Link: https://lore.kernel.org/r/mvmikk0goil.fsf@suse.de
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
This commit is contained in:
Andreas Schwab 2025-07-10 15:32:18 +02:00 committed by Palmer Dabbelt
parent 969f028bf2
commit b3510183ab
No known key found for this signature in database
GPG Key ID: 2E1319F35FBB1889
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/riscv/kernel/traps_misaligned.c
View File

@ -461,7 +461,7 @@ static int handle_scalar_misaligned_load(struct pt_regs *regs)
}
if (!fp)
SET_RD(insn, regs, val.data_ulong << shift >> shift);
SET_RD(insn, regs, (long)(val.data_ulong << shift) >> shift);
else if (len == 8)
set_f64_rd(insn, regs, val.data_u64);
else