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arm64: dts: ti: k3-am62l: support cpufreq scaling

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Enable CPUFreq support for AM62L SoC by adding the relevant OPP efuse table
syscon for speed grade detection.
Add the operating-points-v2 table with CPU frequency steps from 200MHz to
1.25GHz.
Specify the CPU clocks to reference the SCMI clock controller for frequency
scaling.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Kendall Willis <k-willis@ti.com>
Link: https://patch.msgid.link/20260122-am62l-cpufreq-v5-1-65c50af71681@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Dhruva Gole 2026-01-22 21:13:57 +05:30 committed by Vignesh Raghavendra
parent 6de23f81a5
commit b349c778a8
2 changed files with 52 additions and 0 deletions
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5
arch/arm64/boot/dts/ti/k3-am62l-wakeup.dtsi
View File

@ -127,6 +127,11 @@ chipid: chipid@14 {
bootph-all;
};
opp_efuse_table: syscon@18 {
compatible = "ti,am62-opp-efuse-table", "syscon";
reg = <0x18 0x4>;
};
cpsw_mac_syscon: ethernet-mac-syscon@2000 {
compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
reg = <0x2000 0x8>;

47
arch/arm64/boot/dts/ti/k3-am62l3.dtsi
View File

@ -39,6 +39,8 @@ cpu0: cpu@0 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&l2_0>;
operating-points-v2 = <&a53_opp_table>;
clocks = <&scmi_clk 356>;
};
cpu1: cpu@1 {
@ -53,6 +55,8 @@ cpu1: cpu@1 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&l2_0>;
operating-points-v2 = <&a53_opp_table>;
clocks = <&scmi_clk 357>;
};
};
@ -64,4 +68,47 @@ l2_0: l2-cache0 {
cache-line-size = <64>;
cache-sets = <256>;
};
a53_opp_table: opp-table {
compatible = "operating-points-v2-ti-cpu";
opp-shared;
syscon = <&opp_efuse_table>;
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-supported-hw = <0x01 0x0003>;
clock-latency-ns = <6000000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-supported-hw = <0x01 0x0003>;
clock-latency-ns = <6000000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-supported-hw = <0x01 0x0003>;
clock-latency-ns = <6000000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-supported-hw = <0x01 0x0003>;
clock-latency-ns = <6000000>;
};
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
opp-supported-hw = <0x01 0x0002>;
clock-latency-ns = <6000000>;
};
opp-1250000000 {
opp-hz = /bits/ 64 <1250000000>;
opp-supported-hw = <0x01 0x0002>;
clock-latency-ns = <6000000>;
opp-suspend;
};
};
};