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drm/amdgpu: Do not wait for MP0_C2PMSG_33 IFWI init in SRIOV
SRIOV does not need to wait for IFWI init, and MP0_C2PMSG_33 is blocked for VF access. Signed-off-by: Victor Lu <victorchengchi.lu@amd.com> Reviewed-by: Vignesh Chander <Vignesh.Chander@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -260,19 +260,21 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,
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u32 msg;
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int i, ret = 0;
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/* It can take up to a second for IFWI init to complete on some dGPUs,
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* but generally it should be in the 60-100ms range. Normally this starts
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* as soon as the device gets power so by the time the OS loads this has long
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* completed. However, when a card is hotplugged via e.g., USB4, we need to
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* wait for this to complete. Once the C2PMSG is updated, we can
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* continue.
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*/
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if (!amdgpu_sriov_vf(adev)) {
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/* It can take up to a second for IFWI init to complete on some dGPUs,
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* but generally it should be in the 60-100ms range. Normally this starts
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* as soon as the device gets power so by the time the OS loads this has long
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* completed. However, when a card is hotplugged via e.g., USB4, we need to
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* wait for this to complete. Once the C2PMSG is updated, we can
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* continue.
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*/
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for (i = 0; i < 1000; i++) {
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msg = RREG32(mmMP0_SMN_C2PMSG_33);
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if (msg & 0x80000000)
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break;
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usleep_range(1000, 1100);
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for (i = 0; i < 1000; i++) {
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msg = RREG32(mmMP0_SMN_C2PMSG_33);
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if (msg & 0x80000000)
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break;
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usleep_range(1000, 1100);
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}
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}
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vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;
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