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ice: devlink PF MSI-X max and min parameter
Use generic devlink PF MSI-X parameter to allow user to change MSI-X range. Add notes about this parameters into ice devlink documentation. Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> Signed-off-by: Michal Swiatkowski <michal.swiatkowski@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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@ -69,6 +69,17 @@ Parameters
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To verify that value has been set:
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$ devlink dev param show pci/0000:16:00.0 name tx_scheduling_layers
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* - ``msix_vec_per_pf_max``
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- driverinit
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- Set the max MSI-X that can be used by the PF, rest can be utilized for
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SRIOV. The range is from min value set in msix_vec_per_pf_min to
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2k/number of ports.
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* - ``msix_vec_per_pf_min``
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- driverinit
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- Set the min MSI-X that will be used by the PF. This value inform how many
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MSI-X will be allocated statically. The range is from 2 to value set
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in msix_vec_per_pf_max.
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.. list-table:: Driver specific parameters implemented
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:widths: 5 5 90
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@ -1202,6 +1202,25 @@ static int ice_devlink_set_parent(struct devlink_rate *devlink_rate,
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return status;
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}
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static void ice_set_min_max_msix(struct ice_pf *pf)
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{
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struct devlink *devlink = priv_to_devlink(pf);
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union devlink_param_value val;
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int err;
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err = devl_param_driverinit_value_get(devlink,
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DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,
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&val);
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if (!err)
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pf->msix.min = val.vu32;
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err = devl_param_driverinit_value_get(devlink,
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DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,
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&val);
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if (!err)
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pf->msix.max = val.vu32;
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}
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/**
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* ice_devlink_reinit_up - do reinit of the given PF
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* @pf: pointer to the PF struct
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@ -1217,6 +1236,9 @@ static int ice_devlink_reinit_up(struct ice_pf *pf)
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return err;
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}
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/* load MSI-X values */
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ice_set_min_max_msix(pf);
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err = ice_init_dev(pf);
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if (err)
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goto unroll_hw_init;
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@ -1530,6 +1552,30 @@ static int ice_devlink_local_fwd_validate(struct devlink *devlink, u32 id,
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return 0;
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}
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static int
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ice_devlink_msix_max_pf_validate(struct devlink *devlink, u32 id,
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union devlink_param_value val,
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struct netlink_ext_ack *extack)
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{
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struct ice_pf *pf = devlink_priv(devlink);
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if (val.vu32 > pf->hw.func_caps.common_cap.num_msix_vectors)
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return -EINVAL;
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return 0;
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}
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static int
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ice_devlink_msix_min_pf_validate(struct devlink *devlink, u32 id,
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union devlink_param_value val,
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struct netlink_ext_ack *extack)
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{
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if (val.vu32 < ICE_MIN_MSIX)
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return -EINVAL;
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return 0;
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}
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enum ice_param_id {
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ICE_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
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ICE_DEVLINK_PARAM_ID_TX_SCHED_LAYERS,
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@ -1547,6 +1593,15 @@ static const struct devlink_param ice_dvl_rdma_params[] = {
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ice_devlink_enable_iw_validate),
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};
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static const struct devlink_param ice_dvl_msix_params[] = {
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DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MAX,
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BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
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NULL, NULL, ice_devlink_msix_max_pf_validate),
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DEVLINK_PARAM_GENERIC(MSIX_VEC_PER_PF_MIN,
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BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
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NULL, NULL, ice_devlink_msix_min_pf_validate),
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};
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static const struct devlink_param ice_dvl_sched_params[] = {
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DEVLINK_PARAM_DRIVER(ICE_DEVLINK_PARAM_ID_TX_SCHED_LAYERS,
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"tx_scheduling_layers",
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@ -1648,6 +1703,7 @@ void ice_devlink_unregister(struct ice_pf *pf)
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int ice_devlink_register_params(struct ice_pf *pf)
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{
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struct devlink *devlink = priv_to_devlink(pf);
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union devlink_param_value value;
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struct ice_hw *hw = &pf->hw;
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int status;
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@ -1656,10 +1712,33 @@ int ice_devlink_register_params(struct ice_pf *pf)
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if (status)
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return status;
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status = devl_params_register(devlink, ice_dvl_msix_params,
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ARRAY_SIZE(ice_dvl_msix_params));
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if (status)
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goto unregister_rdma_params;
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if (hw->func_caps.common_cap.tx_sched_topo_comp_mode_en)
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status = devl_params_register(devlink, ice_dvl_sched_params,
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ARRAY_SIZE(ice_dvl_sched_params));
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if (status)
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goto unregister_msix_params;
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value.vu32 = pf->msix.max;
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devl_param_driverinit_value_set(devlink,
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DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MAX,
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value);
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value.vu32 = pf->msix.min;
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devl_param_driverinit_value_set(devlink,
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DEVLINK_PARAM_GENERIC_ID_MSIX_VEC_PER_PF_MIN,
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value);
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return 0;
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unregister_msix_params:
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devl_params_unregister(devlink, ice_dvl_msix_params,
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ARRAY_SIZE(ice_dvl_msix_params));
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unregister_rdma_params:
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devl_params_unregister(devlink, ice_dvl_rdma_params,
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ARRAY_SIZE(ice_dvl_rdma_params));
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return status;
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}
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@ -1670,6 +1749,8 @@ void ice_devlink_unregister_params(struct ice_pf *pf)
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devl_params_unregister(devlink, ice_dvl_rdma_params,
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ARRAY_SIZE(ice_dvl_rdma_params));
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devl_params_unregister(devlink, ice_dvl_msix_params,
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ARRAY_SIZE(ice_dvl_msix_params));
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if (hw->func_caps.common_cap.tx_sched_topo_comp_mode_en)
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devl_params_unregister(devlink, ice_dvl_sched_params,
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@ -542,6 +542,12 @@ struct ice_agg_node {
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u8 valid;
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};
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struct ice_pf_msix {
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u32 cur;
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u32 min;
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u32 max;
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};
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struct ice_pf {
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struct pci_dev *pdev;
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struct ice_adapter *adapter;
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@ -612,6 +618,7 @@ struct ice_pf {
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struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */
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u16 max_pf_txqs; /* Total Tx queues PF wide */
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u16 max_pf_rxqs; /* Total Rx queues PF wide */
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struct ice_pf_msix msix;
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u16 num_lan_msix; /* Total MSIX vectors for base driver */
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u16 num_lan_tx; /* num LAN Tx queues setup */
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u16 num_lan_rx; /* num LAN Rx queues setup */
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@ -254,6 +254,13 @@ int ice_init_interrupt_scheme(struct ice_pf *pf)
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int total_vectors = pf->hw.func_caps.common_cap.num_msix_vectors;
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int vectors, max_vectors;
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/* load default PF MSI-X range */
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if (!pf->msix.min)
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pf->msix.min = ICE_MIN_MSIX;
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if (!pf->msix.max)
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pf->msix.max = total_vectors / 2;
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vectors = ice_ena_msix_range(pf);
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if (vectors < 0)
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