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drm/amd/display: Exit LS for ISHARP before coefficient write

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[Why]
The hardware programming guide indicates that we must exit LS before
any coefficient writes.

This is true across all ASIC for this block.

[How]
Drop the ips_v2 checks and unconditionall perform the update.
It is not based on IPS V2 support, which is set for DCN42, but rather
the presence of the block itself.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: George Zhang <george.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nicholas Kazlauskas 2026-06-30 11:07:49 -04:00 committed by Alex Deucher
parent 47c9c743ec
commit b23470a026
1 changed files with 11 additions and 14 deletions
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25
drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c
View File

@ -963,14 +963,13 @@ static void dpp401_dscl_program_isharp(struct dpp *dpp_base,
PERF_TRACE();
/*power on isharp_delta_mem first*/
if (dpp_base->ctx->dc->caps.ips_v2_support) {
/*HW default is LS, need to wake up*/
REG_UPDATE_2(ISHARP_DELTA_LUT_MEM_PWR_CTRL,
ISHARP_DELTA_LUT_MEM_PWR_FORCE, 0,
ISHARP_DELTA_LUT_MEM_PWR_DIS, 1);
REG_WAIT(ISHARP_DELTA_LUT_MEM_PWR_CTRL,
ISHARP_DELTA_LUT_MEM_PWR_STATE, 0, 1, 100);
}
REG_UPDATE_2(ISHARP_DELTA_LUT_MEM_PWR_CTRL,
ISHARP_DELTA_LUT_MEM_PWR_FORCE, 0,
ISHARP_DELTA_LUT_MEM_PWR_DIS, 1);
REG_WAIT(ISHARP_DELTA_LUT_MEM_PWR_CTRL,
ISHARP_DELTA_LUT_MEM_PWR_STATE, 0, 1, 100);
/* ISHARP_MODE */
REG_SET_6(ISHARP_MODE, 0,
ISHARP_EN, scl_data->dscl_prog_data.isharp_en,
@ -1049,12 +1048,10 @@ static void dpp401_dscl_program_isharp(struct dpp *dpp_base,
}
/*power on isharp_delta_mem first*/
if (dpp_base->ctx->dc->caps.ips_v2_support) {
/*HW default is LS, need to wake up*/
REG_UPDATE_SEQ_2(ISHARP_DELTA_LUT_MEM_PWR_CTRL,
ISHARP_DELTA_LUT_MEM_PWR_FORCE, 0,
ISHARP_DELTA_LUT_MEM_PWR_DIS, 0);
}
REG_UPDATE_SEQ_2(ISHARP_DELTA_LUT_MEM_PWR_CTRL,
ISHARP_DELTA_LUT_MEM_PWR_FORCE, 0,
ISHARP_DELTA_LUT_MEM_PWR_DIS, 0);
PERF_TRACE();
} // dpp401_dscl_program_isharp
/**