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dt-bindings: phy: qcom,qusb2: do not define properties in "if" block
It is more readable to define properties in top-level "properties:" and
restrict them (if needed) per compatible in the "if" block. Defining
properties in "if" block does not work correctly with
additionalProperties:false:
sc7180-trogdor-pazquel-lte-ti.dtb: phy@88e3000: 'qcom,bias-ctrl-value', 'qcom,charge-ctrl-value', 'qcom,hsdisc-trim-value',
'qcom,imp-res-offset-value', 'qcom,preemphasis-level', 'qcom,preemphasis-width' do not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221224154226.43417-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
parent
9160fb7c39
commit
b1e96b50da
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@ -82,81 +82,74 @@ properties:
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Phandle to TCSR syscon register region.
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$ref: /schemas/types.yaml#/definitions/phandle
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if:
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properties:
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compatible:
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contains:
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const: qcom,qusb2-v2-phy
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then:
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properties:
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qcom,imp-res-offset-value:
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description:
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It is a 6 bit value that specifies offset to be
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added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
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tuning parameter that may vary for different boards of same SOC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 63
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default: 0
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qcom,imp-res-offset-value:
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description:
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It is a 6 bit value that specifies offset to be
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added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY
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tuning parameter that may vary for different boards of same SOC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 63
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default: 0
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qcom,bias-ctrl-value:
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description:
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It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
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tuning parameter that may vary for different boards of same SOC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 63
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default: 32
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qcom,bias-ctrl-value:
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description:
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It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
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tuning parameter that may vary for different boards of same SOC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 63
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default: 32
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qcom,charge-ctrl-value:
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description:
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It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
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tuning parameter that may vary for different boards of same SOC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 0
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qcom,charge-ctrl-value:
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description:
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It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
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tuning parameter that may vary for different boards of same SOC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 0
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qcom,hstx-trim-value:
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description:
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It is a 4 bit value that specifies tuning for HSTX
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output current.
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Possible range is - 15mA to 24mA (stepsize of 600 uA).
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See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 15
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default: 3
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qcom,hstx-trim-value:
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description:
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It is a 4 bit value that specifies tuning for HSTX
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output current.
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Possible range is - 15mA to 24mA (stepsize of 600 uA).
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See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 15
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default: 3
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qcom,preemphasis-level:
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description:
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It is a 2 bit value that specifies pre-emphasis level.
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Possible range is 0 to 15% (stepsize of 5%).
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See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 2
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qcom,preemphasis-level:
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description:
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It is a 2 bit value that specifies pre-emphasis level.
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Possible range is 0 to 15% (stepsize of 5%).
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See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 2
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qcom,preemphasis-width:
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description:
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It is a 1 bit value that specifies how long the HSTX
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pre-emphasis (specified using qcom,preemphasis-level) must be in
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effect. Duration could be half-bit of full-bit.
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See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 1
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default: 0
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qcom,preemphasis-width:
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description:
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It is a 1 bit value that specifies how long the HSTX
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pre-emphasis (specified using qcom,preemphasis-level) must be in
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effect. Duration could be half-bit of full-bit.
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See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 1
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default: 0
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qcom,hsdisc-trim-value:
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description:
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It is a 2 bit value tuning parameter that control disconnect
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threshold and may vary for different boards of same SOC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 0
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qcom,hsdisc-trim-value:
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description:
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It is a 2 bit value tuning parameter that control disconnect
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threshold and may vary for different boards of same SOC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 3
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default: 0
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required:
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- compatible
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@ -169,6 +162,23 @@ required:
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- vdda-phy-dpdm-supply
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- resets
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allOf:
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- if:
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not:
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properties:
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compatible:
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contains:
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const: qcom,qusb2-v2-phy
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then:
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properties:
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qcom,imp-res-offset-value: false
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qcom,bias-ctrl-value: false
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qcom,charge-ctrl-value: false
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qcom,hstx-trim-value: false
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qcom,preemphasis-level: false
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qcom,preemphasis-width: false
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qcom,hsdisc-trim-value: false
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additionalProperties: false
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examples:
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