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net: xilinx: axienet: Remove unused checksum variables
These variables are set but never used. Remove them. Signed-off-by: Sean Anderson <sean.anderson@linux.dev> Reviewed-by: Simon Horman <horms@kernel.org> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://patch.msgid.link/20240909161016.1149119-2-sean.anderson@linux.dev Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -529,8 +529,6 @@ struct skbuf_dma_descriptor {
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* supported, the maximum frame size would be 9k. Else it is
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* 1522 bytes (assuming support for basic VLAN)
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* @rxmem: Stores rx memory size for jumbo frame handling.
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* @csum_offload_on_tx_path: Stores the checksum selection on TX side.
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* @csum_offload_on_rx_path: Stores the checksum selection on RX side.
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* @coalesce_count_rx: Store the irq coalesce on RX side.
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* @coalesce_usec_rx: IRQ coalesce delay for RX
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* @coalesce_count_tx: Store the irq coalesce on TX side.
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@ -609,9 +607,6 @@ struct axienet_local {
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u32 max_frm_size;
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u32 rxmem;
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int csum_offload_on_tx_path;
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int csum_offload_on_rx_path;
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u32 coalesce_count_rx;
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u32 coalesce_usec_rx;
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u32 coalesce_count_tx;
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@ -2639,38 +2639,26 @@ static int axienet_probe(struct platform_device *pdev)
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if (!ret) {
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switch (value) {
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case 1:
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lp->csum_offload_on_tx_path =
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XAE_FEATURE_PARTIAL_TX_CSUM;
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lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM;
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/* Can checksum TCP/UDP over IPv4. */
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ndev->features |= NETIF_F_IP_CSUM;
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break;
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case 2:
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lp->csum_offload_on_tx_path =
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XAE_FEATURE_FULL_TX_CSUM;
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lp->features |= XAE_FEATURE_FULL_TX_CSUM;
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/* Can checksum TCP/UDP over IPv4. */
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ndev->features |= NETIF_F_IP_CSUM;
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break;
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default:
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lp->csum_offload_on_tx_path = XAE_NO_CSUM_OFFLOAD;
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}
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}
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ret = of_property_read_u32(pdev->dev.of_node, "xlnx,rxcsum", &value);
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if (!ret) {
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switch (value) {
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case 1:
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lp->csum_offload_on_rx_path =
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XAE_FEATURE_PARTIAL_RX_CSUM;
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lp->features |= XAE_FEATURE_PARTIAL_RX_CSUM;
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break;
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case 2:
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lp->csum_offload_on_rx_path =
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XAE_FEATURE_FULL_RX_CSUM;
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lp->features |= XAE_FEATURE_FULL_RX_CSUM;
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break;
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default:
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lp->csum_offload_on_rx_path = XAE_NO_CSUM_OFFLOAD;
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}
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}
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/* For supporting jumbo frames, the Axi Ethernet hardware must have
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