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Merge branch 'net-mlx5e-reduce-interface-downtime-on-configuration-change'
Tariq Toukan says: ==================== net/mlx5e: Reduce interface downtime on configuration change This series significantly reduces the interface downtime while swapping channels during a configuration change, on capable devices. Here we remove an old requirement on operations ordering that became obsolete on recent capable devices. This helps cutting the downtime by a factor of magnitude, ~80% in our example. Perf numbers: Measured the number of dropped packets in a simple ping flood test, during a configuration change operation, that switches the number of channels from 247 to 248. Before: 71 packets lost After: 15 packets lost, ~80% saving. ==================== Link: https://patch.msgid.link/1761831159-1013140-1-git-send-email-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
b117befe8a
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@ -1156,7 +1156,9 @@ extern const struct ethtool_ops mlx5e_ethtool_ops;
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int mlx5e_create_mkey(struct mlx5_core_dev *mdev, u32 pdn, u32 *mkey);
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int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev, bool create_tises);
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void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev);
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int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb,
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int mlx5e_modify_tirs_lb(struct mlx5_core_dev *mdev, bool enable_uc_lb,
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bool enable_mc_lb);
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int mlx5e_refresh_tirs(struct mlx5_core_dev *mdev, bool enable_uc_lb,
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bool enable_mc_lb);
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void mlx5e_mkey_set_relaxed_ordering(struct mlx5_core_dev *mdev, void *mkc);
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@ -231,6 +231,8 @@ mlx5e_rss_create_tir(struct mlx5e_rss *rss, enum mlx5_traffic_types tt,
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rqtn, rss_inner);
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mlx5e_tir_builder_build_packet_merge(builder, pkt_merge_param);
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rss_tt = mlx5e_rss_get_tt_config(rss, tt);
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mlx5e_tir_builder_build_self_lb_block(builder, rss->params.self_lb_blk,
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rss->params.self_lb_blk);
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mlx5e_tir_builder_build_rss(builder, &rss->hash, &rss_tt, inner);
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err = mlx5e_tir_init(tir, builder, rss->mdev, true);
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@ -23,6 +23,7 @@ struct mlx5e_rss_init_params {
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struct mlx5e_rss_params {
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bool inner_ft_support;
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u32 drop_rqn;
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bool self_lb_blk;
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};
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struct mlx5e_rss_params_traffic_type
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@ -71,6 +71,8 @@ static int mlx5e_rx_res_rss_init_def(struct mlx5e_rx_res *res,
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rss_params = (struct mlx5e_rss_params) {
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.inner_ft_support = inner_ft_support,
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.drop_rqn = res->drop_rqn,
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.self_lb_blk =
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res->features & MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK,
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};
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rss = mlx5e_rss_init(res->mdev, &rss_params, &init_params);
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@ -104,6 +106,8 @@ int mlx5e_rx_res_rss_init(struct mlx5e_rx_res *res, u32 rss_idx, unsigned int in
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rss_params = (struct mlx5e_rss_params) {
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.inner_ft_support = inner_ft_support,
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.drop_rqn = res->drop_rqn,
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.self_lb_blk =
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res->features & MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK,
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};
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rss = mlx5e_rss_init(res->mdev, &rss_params, &init_params);
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@ -346,6 +350,7 @@ static struct mlx5e_rx_res *mlx5e_rx_res_alloc(struct mlx5_core_dev *mdev, unsig
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static int mlx5e_rx_res_channels_init(struct mlx5e_rx_res *res)
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{
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bool inner_ft_support = res->features & MLX5E_RX_RES_FEATURE_INNER_FT;
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bool self_lb_blk = res->features & MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK;
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struct mlx5e_tir_builder *builder;
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int err = 0;
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int ix;
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@ -376,6 +381,8 @@ static int mlx5e_rx_res_channels_init(struct mlx5e_rx_res *res)
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mlx5e_rqt_get_rqtn(&res->channels[ix].direct_rqt),
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inner_ft_support);
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mlx5e_tir_builder_build_packet_merge(builder, &res->pkt_merge_param);
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mlx5e_tir_builder_build_self_lb_block(builder, self_lb_blk,
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self_lb_blk);
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mlx5e_tir_builder_build_direct(builder);
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err = mlx5e_tir_init(&res->channels[ix].direct_tir, builder, res->mdev, true);
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@ -21,6 +21,7 @@ enum mlx5e_rx_res_features {
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MLX5E_RX_RES_FEATURE_INNER_FT = BIT(0),
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MLX5E_RX_RES_FEATURE_PTP = BIT(1),
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MLX5E_RX_RES_FEATURE_MULTI_VHCA = BIT(2),
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MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK = BIT(3),
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};
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/* Setup */
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@ -146,6 +146,31 @@ void mlx5e_tir_builder_build_direct(struct mlx5e_tir_builder *builder)
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MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_INVERTED_XOR8);
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}
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static void mlx5e_tir_context_self_lb_block(void *tirc, bool enable_uc_lb,
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bool enable_mc_lb)
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{
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u8 lb_flags = 0;
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if (enable_uc_lb)
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lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
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if (enable_mc_lb)
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lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
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MLX5_SET(tirc, tirc, self_lb_block, lb_flags);
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}
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void mlx5e_tir_builder_build_self_lb_block(struct mlx5e_tir_builder *builder,
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bool enable_uc_lb,
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bool enable_mc_lb)
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{
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void *tirc = mlx5e_tir_builder_get_tirc(builder);
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if (builder->modify)
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MLX5_SET(modify_tir_in, builder->in, bitmask.self_lb_en, 1);
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mlx5e_tir_context_self_lb_block(tirc, enable_uc_lb, enable_mc_lb);
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}
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void mlx5e_tir_builder_build_tls(struct mlx5e_tir_builder *builder)
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{
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void *tirc = mlx5e_tir_builder_get_tirc(builder);
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@ -153,9 +178,7 @@ void mlx5e_tir_builder_build_tls(struct mlx5e_tir_builder *builder)
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WARN_ON(builder->modify);
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MLX5_SET(tirc, tirc, tls_en, 1);
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MLX5_SET(tirc, tirc, self_lb_block,
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MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST |
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MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST);
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mlx5e_tir_context_self_lb_block(tirc, true, true);
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}
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int mlx5e_tir_init(struct mlx5e_tir *tir, struct mlx5e_tir_builder *builder,
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@ -35,6 +35,9 @@ void mlx5e_tir_builder_build_rss(struct mlx5e_tir_builder *builder,
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const struct mlx5e_rss_params_traffic_type *rss_tt,
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bool inner);
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void mlx5e_tir_builder_build_direct(struct mlx5e_tir_builder *builder);
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void mlx5e_tir_builder_build_self_lb_block(struct mlx5e_tir_builder *builder,
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bool enable_uc_lb,
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bool enable_mc_lb);
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void mlx5e_tir_builder_build_tls(struct mlx5e_tir_builder *builder);
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struct mlx5_core_dev;
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@ -247,45 +247,43 @@ void mlx5e_destroy_mdev_resources(struct mlx5_core_dev *mdev)
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memset(res, 0, sizeof(*res));
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}
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int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb,
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bool enable_mc_lb)
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int mlx5e_modify_tirs_lb(struct mlx5_core_dev *mdev, bool enable_uc_lb,
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bool enable_mc_lb)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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struct mlx5e_tir_builder *builder;
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struct mlx5e_tir *tir;
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u8 lb_flags = 0;
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int err = 0;
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u32 tirn = 0;
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int inlen;
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void *in;
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int err = 0;
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inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
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in = kvzalloc(inlen, GFP_KERNEL);
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if (!in)
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builder = mlx5e_tir_builder_alloc(true);
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if (!builder)
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return -ENOMEM;
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if (enable_uc_lb)
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lb_flags = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST;
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if (enable_mc_lb)
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lb_flags |= MLX5_TIRC_SELF_LB_BLOCK_BLOCK_MULTICAST;
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if (lb_flags)
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MLX5_SET(modify_tir_in, in, ctx.self_lb_block, lb_flags);
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MLX5_SET(modify_tir_in, in, bitmask.self_lb_en, 1);
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mlx5e_tir_builder_build_self_lb_block(builder, enable_uc_lb,
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enable_mc_lb);
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mutex_lock(&mdev->mlx5e_res.hw_objs.td.list_lock);
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list_for_each_entry(tir, &mdev->mlx5e_res.hw_objs.td.tirs_list, list) {
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tirn = tir->tirn;
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err = mlx5_core_modify_tir(mdev, tirn, in);
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if (err)
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err = mlx5e_tir_modify(tir, builder);
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if (err) {
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mlx5_core_err(mdev,
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"modify tir(0x%x) enable_lb uc(%d) mc(%d) failed, %d\n",
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mlx5e_tir_get_tirn(tir),
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enable_uc_lb, enable_mc_lb, err);
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break;
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}
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}
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mutex_unlock(&mdev->mlx5e_res.hw_objs.td.list_lock);
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kvfree(in);
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if (err)
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netdev_err(priv->netdev, "refresh tir(0x%x) failed, %d\n", tirn, err);
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mlx5e_tir_builder_free(builder);
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return err;
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}
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int mlx5e_refresh_tirs(struct mlx5_core_dev *mdev, bool enable_uc_lb,
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bool enable_mc_lb)
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{
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if (MLX5_CAP_GEN(mdev, tis_tir_td_order))
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return 0; /* refresh not needed */
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return mlx5e_modify_tirs_lb(mdev, enable_uc_lb, enable_mc_lb);
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}
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@ -3356,12 +3356,12 @@ static int mlx5e_switch_priv_params(struct mlx5e_priv *priv,
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}
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static int mlx5e_switch_priv_channels(struct mlx5e_priv *priv,
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struct mlx5e_channels *old_chs,
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struct mlx5e_channels *new_chs,
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mlx5e_fp_preactivate preactivate,
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void *context)
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{
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struct net_device *netdev = priv->netdev;
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struct mlx5e_channels old_chs;
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int carrier_ok;
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int err = 0;
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@ -3370,7 +3370,6 @@ static int mlx5e_switch_priv_channels(struct mlx5e_priv *priv,
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mlx5e_deactivate_priv_channels(priv);
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old_chs = priv->channels;
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priv->channels = *new_chs;
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/* New channels are ready to roll, call the preactivate hook if needed
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@ -3379,12 +3378,13 @@ static int mlx5e_switch_priv_channels(struct mlx5e_priv *priv,
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if (preactivate) {
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err = preactivate(priv, context);
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if (err) {
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priv->channels = old_chs;
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priv->channels = *old_chs;
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goto out;
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}
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}
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mlx5e_close_channels(&old_chs);
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if (!MLX5_CAP_GEN(priv->mdev, tis_tir_td_order))
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mlx5e_close_channels(old_chs);
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priv->profile->update_rx(priv);
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mlx5e_selq_apply(&priv->selq);
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@ -3403,16 +3403,20 @@ int mlx5e_safe_switch_params(struct mlx5e_priv *priv,
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mlx5e_fp_preactivate preactivate,
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void *context, bool reset)
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{
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struct mlx5e_channels *new_chs;
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struct mlx5e_channels *old_chs, *new_chs;
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int err;
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reset &= test_bit(MLX5E_STATE_OPENED, &priv->state);
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if (!reset)
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return mlx5e_switch_priv_params(priv, params, preactivate, context);
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old_chs = kzalloc(sizeof(*old_chs), GFP_KERNEL);
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new_chs = kzalloc(sizeof(*new_chs), GFP_KERNEL);
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if (!new_chs)
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return -ENOMEM;
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if (!old_chs || !new_chs) {
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err = -ENOMEM;
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goto err_free_chs;
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}
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new_chs->params = *params;
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mlx5e_selq_prepare_params(&priv->selq, &new_chs->params);
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@ -3421,11 +3425,18 @@ int mlx5e_safe_switch_params(struct mlx5e_priv *priv,
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if (err)
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goto err_cancel_selq;
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err = mlx5e_switch_priv_channels(priv, new_chs, preactivate, context);
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*old_chs = priv->channels;
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err = mlx5e_switch_priv_channels(priv, old_chs, new_chs,
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preactivate, context);
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if (err)
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goto err_close;
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if (MLX5_CAP_GEN(priv->mdev, tis_tir_td_order))
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mlx5e_close_channels(old_chs);
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kfree(new_chs);
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kfree(old_chs);
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return 0;
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err_close:
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@ -3433,7 +3444,9 @@ int mlx5e_safe_switch_params(struct mlx5e_priv *priv,
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err_cancel_selq:
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mlx5e_selq_cancel(&priv->selq);
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err_free_chs:
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kfree(new_chs);
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kfree(old_chs);
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return err;
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}
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@ -6136,7 +6149,7 @@ static void mlx5e_nic_disable(struct mlx5e_priv *priv)
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static int mlx5e_update_nic_rx(struct mlx5e_priv *priv)
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{
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return mlx5e_refresh_tirs(priv, false, false);
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return mlx5e_refresh_tirs(priv->mdev, false, false);
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}
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static const struct mlx5e_profile mlx5e_nic_profile = {
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@ -214,7 +214,7 @@ static int mlx5e_test_loopback_setup(struct mlx5e_priv *priv,
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return err;
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}
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err = mlx5e_refresh_tirs(priv, true, false);
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err = mlx5e_modify_tirs_lb(priv->mdev, true, false);
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if (err)
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goto out;
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@ -243,7 +243,7 @@ static void mlx5e_test_loopback_cleanup(struct mlx5e_priv *priv,
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mlx5_nic_vport_update_local_lb(priv->mdev, false);
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dev_remove_pack(&lbtp->pt);
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mlx5e_refresh_tirs(priv, false, false);
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mlx5e_modify_tirs_lb(priv->mdev, false, false);
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}
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static int mlx5e_cond_loopback(struct mlx5e_priv *priv)
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@ -334,7 +334,7 @@ void mlx5i_destroy_underlay_qp(struct mlx5_core_dev *mdev, u32 qpn)
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int mlx5i_update_nic_rx(struct mlx5e_priv *priv)
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{
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return mlx5e_refresh_tirs(priv, true, true);
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return mlx5e_refresh_tirs(priv->mdev, true, true);
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}
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int mlx5i_create_tis(struct mlx5_core_dev *mdev, u32 underlay_qpn, u32 *tisn)
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@ -427,6 +427,7 @@ static void mlx5i_destroy_flow_steering(struct mlx5e_priv *priv)
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static int mlx5i_init_rx(struct mlx5e_priv *priv)
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{
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struct mlx5_core_dev *mdev = priv->mdev;
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enum mlx5e_rx_res_features features;
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int err;
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priv->fs = mlx5e_fs_init(priv->profile, mdev,
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@ -445,7 +446,9 @@ static int mlx5i_init_rx(struct mlx5e_priv *priv)
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goto err_destroy_q_counters;
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}
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priv->rx_res = mlx5e_rx_res_create(priv->mdev, 0, priv->max_nch, priv->drop_rq.rqn,
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features = MLX5E_RX_RES_FEATURE_SELF_LB_BLOCK;
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priv->rx_res = mlx5e_rx_res_create(priv->mdev, features, priv->max_nch,
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priv->drop_rq.rqn,
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&priv->channels.params.packet_merge,
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priv->channels.params.num_channels);
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if (IS_ERR(priv->rx_res)) {
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