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ASoC: max98090: Add master clock handling
If master clock is provided through device tree, then update the master clock frequency during set_sysclk. Documentation has been updated to reflect the change. Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -10,6 +10,12 @@ Required properties:
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- interrupts : The CODEC's interrupt output.
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- interrupts : The CODEC's interrupt output.
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Optional properties:
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- clocks: The phandle of the master clock to the CODEC
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- clock-names: Should be "mclk"
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Pins on the device (for linking into audio routes):
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Pins on the device (for linking into audio routes):
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* MIC1
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* MIC1
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@ -16,6 +16,7 @@
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#include <linux/regmap.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/acpi.h>
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <sound/jack.h>
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#include <sound/jack.h>
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#include <sound/pcm.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/pcm_params.h>
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@ -1798,6 +1799,19 @@ static int max98090_set_bias_level(struct snd_soc_codec *codec,
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break;
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break;
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case SND_SOC_BIAS_PREPARE:
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case SND_SOC_BIAS_PREPARE:
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/*
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* SND_SOC_BIAS_PREPARE is called while preparing for a
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* transition to ON or away from ON. If current bias_level
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* is SND_SOC_BIAS_ON, then it is preparing for a transition
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* away from ON. Disable the clock in that case, otherwise
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* enable it.
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*/
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if (!IS_ERR(max98090->mclk)) {
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if (codec->dapm.bias_level == SND_SOC_BIAS_ON)
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clk_disable_unprepare(max98090->mclk);
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else
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clk_prepare_enable(max98090->mclk);
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}
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break;
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break;
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case SND_SOC_BIAS_STANDBY:
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case SND_SOC_BIAS_STANDBY:
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@ -1927,6 +1941,11 @@ static int max98090_dai_set_sysclk(struct snd_soc_dai *dai,
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if (freq == max98090->sysclk)
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if (freq == max98090->sysclk)
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return 0;
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return 0;
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if (!IS_ERR(max98090->mclk)) {
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freq = clk_round_rate(max98090->mclk, freq);
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clk_set_rate(max98090->mclk, freq);
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}
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/* Setup clocks for slave mode, and using the PLL
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/* Setup clocks for slave mode, and using the PLL
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* PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
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* PSCLK = 0x01 (when master clk is 10MHz to 20MHz)
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* 0x02 (when master clk is 20MHz to 40MHz)..
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* 0x02 (when master clk is 20MHz to 40MHz)..
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@ -2211,6 +2230,10 @@ static int max98090_probe(struct snd_soc_codec *codec)
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dev_dbg(codec->dev, "max98090_probe\n");
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dev_dbg(codec->dev, "max98090_probe\n");
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max98090->mclk = devm_clk_get(codec->dev, "mclk");
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if (PTR_ERR(max98090->mclk) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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max98090->codec = codec;
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max98090->codec = codec;
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/* Reset the codec, the DSP core, and disable all interrupts */
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/* Reset the codec, the DSP core, and disable all interrupts */
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@ -1524,6 +1524,7 @@ struct max98090_priv {
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struct snd_soc_codec *codec;
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struct snd_soc_codec *codec;
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enum max98090_type devtype;
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enum max98090_type devtype;
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struct max98090_pdata *pdata;
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struct max98090_pdata *pdata;
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struct clk *mclk;
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unsigned int sysclk;
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unsigned int sysclk;
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unsigned int bclk;
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unsigned int bclk;
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unsigned int lrclk;
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unsigned int lrclk;
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