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wifi: rtw89: mac: reset power state before switching to power on
To run power on function properly, reset power states (off/on/PS) to initial state. Otherwise, it might be unusable due to fail to power on. Since a USB adapter might play as USB mass storage with driver and then switch to WiFi adapter, causing it stays on power-on state when doing WiFi USB probe. Exclude this case. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20251223030651.480633-5-pkshih@realtek.com
This commit is contained in:
Ping-Ke Shih
parent
de1ba591d9
commit
b0f1289fd6
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@ -1478,13 +1478,11 @@ static void rtw89_mac_power_switch_boot_mode(struct rtw89_dev *rtwdev)
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static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on)
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{
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#define PWR_ACT 1
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const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
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const struct rtw89_chip_info *chip = rtwdev->chip;
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const struct rtw89_pwr_cfg * const *cfg_seq;
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int (*cfg_func)(struct rtw89_dev *rtwdev);
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int ret;
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u8 val;
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rtw89_mac_power_switch_boot_mode(rtwdev);
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@ -1499,10 +1497,10 @@ static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on)
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if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags))
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__rtw89_leave_ps_mode(rtwdev);
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val = rtw89_read32_mask(rtwdev, R_AX_IC_PWR_STATE, B_AX_WLMAC_PWR_STE_MASK);
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if (on && val == PWR_ACT) {
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rtw89_err(rtwdev, "MAC has already powered on\n");
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return -EBUSY;
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if (on) {
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ret = mac->reset_pwr_state(rtwdev);
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if (ret)
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return ret;
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}
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ret = cfg_func ? cfg_func(rtwdev) : rtw89_mac_pwr_seq(rtwdev, cfg_seq);
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@ -1529,7 +1527,6 @@ static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on)
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}
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return 0;
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#undef PWR_ACT
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}
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int rtw89_mac_pwr_on(struct rtw89_dev *rtwdev)
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@ -3931,6 +3928,29 @@ static int rtw89_mac_feat_init(struct rtw89_dev *rtwdev)
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return 0;
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}
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static int rtw89_mac_reset_pwr_state_ax(struct rtw89_dev *rtwdev)
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{
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u8 val;
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val = rtw89_read32_mask(rtwdev, R_AX_IC_PWR_STATE, B_AX_WLMAC_PWR_STE_MASK);
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if (val == MAC_AX_MAC_ON) {
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/*
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* A USB adapter might play as USB mass storage with driver and
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* then switch to WiFi adapter, causing it stays on power-on
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* state when doing WiFi USB probe. Return EAGAIN to caller to
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* power-off and power-on again to reset the state.
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*/
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if (rtwdev->hci.type == RTW89_HCI_TYPE_USB &&
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!test_bit(RTW89_FLAG_PROBE_DONE, rtwdev->flags))
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return -EAGAIN;
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rtw89_err(rtwdev, "MAC has already powered on\n");
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return -EBUSY;
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}
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return 0;
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}
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static void rtw89_disable_fw_watchdog(struct rtw89_dev *rtwdev)
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{
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u32 val32;
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@ -7206,6 +7226,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
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.set_cpuio = set_cpuio_ax,
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.dle_quota_change = dle_quota_change_ax,
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.reset_pwr_state = rtw89_mac_reset_pwr_state_ax,
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.disable_cpu = rtw89_mac_disable_cpu_ax,
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.fwdl_enable_wcpu = rtw89_mac_enable_cpu_ax,
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.fwdl_get_status = rtw89_fw_get_rdy_ax,
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@ -1052,6 +1052,7 @@ struct rtw89_mac_gen_def {
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struct rtw89_cpuio_ctrl *ctrl_para, bool wd);
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int (*dle_quota_change)(struct rtw89_dev *rtwdev, bool band1_en);
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int (*reset_pwr_state)(struct rtw89_dev *rtwdev);
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void (*disable_cpu)(struct rtw89_dev *rtwdev);
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int (*fwdl_enable_wcpu)(struct rtw89_dev *rtwdev, u8 boot_reason,
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bool dlfw, bool include_bb);
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@ -425,6 +425,135 @@ int rtw89_mac_read_xtal_si_be(struct rtw89_dev *rtwdev, u8 offset, u8 *val)
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return 0;
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}
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static int rtw89_mac_reset_pwr_state_be(struct rtw89_dev *rtwdev)
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{
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u32 val32;
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int ret;
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val32 = rtw89_read32(rtwdev, R_BE_SYSON_FSM_MON);
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val32 &= WLAN_FSM_MASK;
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val32 |= WLAN_FSM_SET;
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rtw89_write32(rtwdev, R_BE_SYSON_FSM_MON, val32);
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ret = read_poll_timeout(rtw89_read32_mask, val32, val32 == WLAN_FSM_IDLE,
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1000, 2000000, false,
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rtwdev, R_BE_SYSON_FSM_MON, WLAN_FSM_STATE_MASK);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling WLAN PMC timeout= %X\n", val32);
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return ret;
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}
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val32 = rtw89_read32_mask(rtwdev, R_BE_IC_PWR_STATE, B_BE_WLMAC_PWR_STE_MASK);
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if (val32 == MAC_AX_MAC_OFF) {
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rtw89_write32_clr(rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HAXIDMA_IO_EN);
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ret = read_poll_timeout(rtw89_read32_mask, val32, !val32,
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1000, 2000000, false,
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rtwdev, R_BE_HCI_OPT_CTRL,
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B_BE_HAXIDMA_IO_ST | B_BE_HAXIDMA_BACKUP_RESTORE_ST);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling HAXI IO timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_clr(rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HCI_WLAN_IO_EN);
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ret = read_poll_timeout(rtw89_read32_mask, val32, !val32,
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1000, 2000000, false,
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rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HCI_WLAN_IO_ST);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling WLAN IO timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_clr(rtwdev, R_BE_SYS_PW_CTRL, B_BE_EN_WLON);
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rtw89_write32_clr(rtwdev, R_BE_SYS_PW_CTRL, B_BE_APFM_SWLPS);
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} else if (val32 == MAC_AX_MAC_ON) {
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rtw89_write32_clr(rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HAXIDMA_IO_EN);
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ret = read_poll_timeout(rtw89_read32_mask, val32, !val32,
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1000, 2000000, false,
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rtwdev, R_BE_HCI_OPT_CTRL,
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B_BE_HAXIDMA_IO_ST | B_BE_HAXIDMA_BACKUP_RESTORE_ST);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling HAXI IO timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_clr(rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HCI_WLAN_IO_EN);
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ret = read_poll_timeout(rtw89_read32_mask, val32, !val32,
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1000, 2000000, false,
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rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HCI_WLAN_IO_ST);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling WLAN IO timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_set(rtwdev, R_BE_SYS_PW_CTRL, B_BE_EN_WLON);
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rtw89_write32_set(rtwdev, R_BE_SYS_PW_CTRL, B_BE_APFM_OFFMAC);
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ret = read_poll_timeout(rtw89_read32_mask, val32, val32 == MAC_AX_MAC_OFF,
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1000, 2000000, false,
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rtwdev, R_BE_SYS_PW_CTRL, B_BE_APFM_OFFMAC);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling MAC state timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_clr(rtwdev, R_BE_SYS_PW_CTRL, B_BE_EN_WLON);
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rtw89_write32_clr(rtwdev, R_BE_SYS_PW_CTRL, B_BE_APFM_SWLPS);
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} else if (val32 == MAC_AX_MAC_LPS) {
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rtw89_write32_clr(rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HAXIDMA_IO_EN);
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ret = read_poll_timeout(rtw89_read32_mask, val32, !val32,
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1000, 2000000, false,
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rtwdev, R_BE_HCI_OPT_CTRL,
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B_BE_HAXIDMA_IO_ST | B_BE_HAXIDMA_BACKUP_RESTORE_ST);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling HAXI IO timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_clr(rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HCI_WLAN_IO_EN);
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ret = read_poll_timeout(rtw89_read32_mask, val32, !val32,
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1000, 2000000, false,
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rtwdev, R_BE_HCI_OPT_CTRL, B_BE_HCI_WLAN_IO_ST);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling WLAN IO timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_set(rtwdev, R_BE_WLLPS_CTRL, B_BE_FORCE_LEAVE_LPS);
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ret = read_poll_timeout(rtw89_read32_mask, val32, val32 == MAC_AX_MAC_ON,
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1000, 2000000, false,
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rtwdev, R_BE_IC_PWR_STATE, B_BE_WLMAC_PWR_STE_MASK);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling MAC STS timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_set(rtwdev, R_BE_SYS_PW_CTRL, B_BE_EN_WLON);
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rtw89_write32_set(rtwdev, R_BE_SYS_PW_CTRL, B_BE_APFM_OFFMAC);
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ret = read_poll_timeout(rtw89_read32_mask, val32, val32 == MAC_AX_MAC_OFF,
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1000, 2000000, false,
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rtwdev, R_BE_SYS_PW_CTRL, B_BE_APFM_OFFMAC);
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if (ret) {
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rtw89_err(rtwdev, "[ERR]Polling MAC state timeout= %X\n", val32);
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return ret;
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}
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rtw89_write32_clr(rtwdev, R_BE_WLLPS_CTRL, B_BE_FORCE_LEAVE_LPS);
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rtw89_write32_clr(rtwdev, R_BE_SYS_PW_CTRL, B_BE_EN_WLON);
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rtw89_write32_clr(rtwdev, R_BE_SYS_PW_CTRL, B_BE_APFM_SWLPS);
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}
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return 0;
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}
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static void rtw89_mac_disable_cpu_be(struct rtw89_dev *rtwdev)
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{
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u32 val32;
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@ -2623,6 +2752,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
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.set_cpuio = set_cpuio_be,
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.dle_quota_change = dle_quota_change_be,
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.reset_pwr_state = rtw89_mac_reset_pwr_state_be,
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.disable_cpu = rtw89_mac_disable_cpu_be,
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.fwdl_enable_wcpu = rtw89_mac_fwdl_enable_wcpu_be,
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.fwdl_get_status = fwdl_get_status_be,
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@ -149,6 +149,7 @@
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#define R_AX_WLLPS_CTRL 0x0090
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#define B_AX_LPSOP_ASWRM BIT(17)
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#define B_AX_LPSOP_DSWRM BIT(9)
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#define B_AX_FORCE_LEAVE_LPS BIT(3)
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#define B_AX_DIS_WLBT_LPSEN_LOPC BIT(1)
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#define SW_LPS_OPTION 0x0001A0B2
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@ -313,6 +314,9 @@
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#define R_AX_IC_PWR_STATE 0x03F0
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#define B_AX_WHOLE_SYS_PWR_STE_MASK GENMASK(25, 16)
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#define B_AX_WLMAC_PWR_STE_MASK GENMASK(9, 8)
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#define MAC_AX_MAC_OFF 0
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#define MAC_AX_MAC_ON 1
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#define MAC_AX_MAC_LPS 2
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#define B_AX_UART_HCISYS_PWR_STE_MASK GENMASK(7, 6)
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#define B_AX_SDIO_HCISYS_PWR_STE_MASK GENMASK(5, 4)
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#define B_AX_USB_HCISYS_PWR_STE_MASK GENMASK(3, 2)
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@ -2094,6 +2098,7 @@
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#define B_AX_B1_ISR_ERR_USRCTL_REINIT BIT(0)
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#define R_AX_AFE_CTRL1 0x0024
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#define B_AX_CMAC_CLK_SEL BIT(21)
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#define B_AX_R_SYM_WLCMAC1_P4_PC_EN BIT(4)
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#define B_AX_R_SYM_WLCMAC1_P3_PC_EN BIT(3)
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@ -2107,6 +2112,12 @@
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#define B_AX_R_SYM_FEN_WLBBFUN_1 BIT(16)
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#define B_AX_R_SYM_ISO_CMAC12PP BIT(5)
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#define R_AX_SYSON_FSM_MON 0x00A0
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#define B_AX_FSM_MON_SEL_MASK GENMASK(26, 24)
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#define B_AX_DOP_ELDO BIT(23)
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#define B_AX_FSM_MON_UPD BIT(15)
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#define B_AX_FSM_PAR_MASK GENMASK(14, 0)
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#define R_AX_CMAC_REG_START 0xC000
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#define R_AX_CMAC_FUNC_EN 0xC000
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@ -4172,6 +4183,22 @@
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#define B_BE_LPSROP_LOWPWRPLL BIT(7)
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#define B_BE_LPSROP_DSWRSD_SEL_MASK GENMASK(5, 4)
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#define R_BE_SYSON_FSM_MON 0x00A0
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#define B_BE_FSM_MON_SEL_MASK GENMASK(26, 24)
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#define B_BE_DOP_ELDO BIT(23)
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#define B_BE_AFE_PLL_BYPASS BIT(22)
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#define B_BE_PON_SWR_BYPASS BIT(21)
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#define B_BE_PON_ADIE_BYPASS BIT(20)
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#define B_BE_AFE_LS_BYPASS BIT(19)
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#define B_BE_BTPMC_XTAL_SI_BYPASS BIT(17)
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#define B_BE_WLPMC_XTAL_SI_BYPASS BIT(16)
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#define B_BE_FSM_MON_UPD BIT(15)
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#define B_BE_FSM_PAR_MASK GENMASK(14, 0)
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#define WLAN_FSM_MASK 0xFFFFFF
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#define WLAN_FSM_SET 0x4000000
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#define WLAN_FSM_STATE_MASK 0x1FF
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#define WLAN_FSM_IDLE 0
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#define R_BE_EFUSE_CTRL_2_V1 0x00A4
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#define B_BE_EF_ENT BIT(31)
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#define B_BE_EF_TCOLUMN_EN BIT(29)
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