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MTD core:
* MAINTAINERS: Add Michal as reviewer instead of Naga
* mtdchar: Mark bits of ioctl handler noinline
NAND controller drivers:
* marvell:
- Don't set the NAND frequency select
- Ensure timing values are written
* ingenic: Fix empty stub helper definitions
SPI-NOR core:
* Fix divide by zero for spi-nor-generic flashes
SPI-NOR manufacturer driver:
* spansion: make sure local struct does not contain garbage
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Merge tag 'mtd/fixes-for-6.4-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull mtd fixes from Miquel Raynal:
"MTD core:
- MAINTAINERS: Add Michal as reviewer instead of Naga
- mtdchar: Mark bits of ioctl handler noinline
NAND controller drivers:
- marvell:
- Don't set the NAND frequency select
- Ensure timing values are written
- ingenic: Fix empty stub helper definitions
SPI-NOR core:
- Fix divide by zero for spi-nor-generic flashes
SPI-NOR manufacturer driver:
- spansion: make sure local struct does not contain garbage"
* tag 'mtd/fixes-for-6.4-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux:
mtd: rawnand: marvell: don't set the NAND frequency select
mtd: rawnand: marvell: ensure timing values are written
mtdchar: mark bits of ioctl handler noinline
MAINTAINERS: Add myself as reviewer instead of Naga
mtd: spi-nor: Fix divide by zero for spi-nor-generic flashes
mtd: rawnand: ingenic: fix empty stub helper definitions
mtd: spi-nor: spansion: make sure local struct does not contain garbage
This commit is contained in:
commit
b0e78154c0
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@ -1601,7 +1601,7 @@ F: drivers/media/i2c/ar0521.c
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ARASAN NAND CONTROLLER DRIVER
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M: Miquel Raynal <miquel.raynal@bootlin.com>
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M: Naga Sureshkumar Relli <nagasure@xilinx.com>
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R: Michal Simek <michal.simek@amd.com>
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L: linux-mtd@lists.infradead.org
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S: Maintained
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F: Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml
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@ -1764,7 +1764,7 @@ F: include/linux/amba/mmci.h
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ARM PRIMECELL PL35X NAND CONTROLLER DRIVER
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M: Miquel Raynal <miquel.raynal@bootlin.com>
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M: Naga Sureshkumar Relli <nagasure@xilinx.com>
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R: Michal Simek <michal.simek@amd.com>
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L: linux-mtd@lists.infradead.org
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S: Maintained
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F: Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml
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@ -1772,7 +1772,7 @@ F: drivers/mtd/nand/raw/pl35x-nand-controller.c
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ARM PRIMECELL PL35X SMC DRIVER
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M: Miquel Raynal <miquel.raynal@bootlin.com>
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M: Naga Sureshkumar Relli <nagasure@xilinx.com>
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R: Michal Simek <michal.simek@amd.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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F: Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml
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@ -590,8 +590,8 @@ static void adjust_oob_length(struct mtd_info *mtd, uint64_t start,
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(end_page - start_page + 1) * oob_per_page);
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}
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static int mtdchar_write_ioctl(struct mtd_info *mtd,
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struct mtd_write_req __user *argp)
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static noinline_for_stack int
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mtdchar_write_ioctl(struct mtd_info *mtd, struct mtd_write_req __user *argp)
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{
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struct mtd_info *master = mtd_get_master(mtd);
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struct mtd_write_req req;
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@ -688,8 +688,8 @@ static int mtdchar_write_ioctl(struct mtd_info *mtd,
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return ret;
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}
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static int mtdchar_read_ioctl(struct mtd_info *mtd,
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struct mtd_read_req __user *argp)
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static noinline_for_stack int
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mtdchar_read_ioctl(struct mtd_info *mtd, struct mtd_read_req __user *argp)
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{
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struct mtd_info *master = mtd_get_master(mtd);
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struct mtd_read_req req;
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@ -36,25 +36,25 @@ int ingenic_ecc_correct(struct ingenic_ecc *ecc,
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void ingenic_ecc_release(struct ingenic_ecc *ecc);
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struct ingenic_ecc *of_ingenic_ecc_get(struct device_node *np);
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#else /* CONFIG_MTD_NAND_INGENIC_ECC */
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int ingenic_ecc_calculate(struct ingenic_ecc *ecc,
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static inline int ingenic_ecc_calculate(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params,
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const u8 *buf, u8 *ecc_code)
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{
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return -ENODEV;
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}
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int ingenic_ecc_correct(struct ingenic_ecc *ecc,
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static inline int ingenic_ecc_correct(struct ingenic_ecc *ecc,
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struct ingenic_ecc_params *params, u8 *buf,
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u8 *ecc_code)
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{
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return -ENODEV;
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}
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void ingenic_ecc_release(struct ingenic_ecc *ecc)
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static inline void ingenic_ecc_release(struct ingenic_ecc *ecc)
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{
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}
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struct ingenic_ecc *of_ingenic_ecc_get(struct device_node *np)
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static inline struct ingenic_ecc *of_ingenic_ecc_get(struct device_node *np)
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{
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return ERR_PTR(-ENODEV);
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}
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@ -2457,6 +2457,12 @@ static int marvell_nfc_setup_interface(struct nand_chip *chip, int chipnr,
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NDTR1_WAIT_MODE;
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}
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/*
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* Reset nfc->selected_chip so the next command will cause the timing
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* registers to be updated in marvell_nfc_select_target().
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*/
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nfc->selected_chip = NULL;
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return 0;
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}
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@ -2894,10 +2900,6 @@ static int marvell_nfc_init(struct marvell_nfc *nfc)
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regmap_update_bits(sysctrl_base, GENCONF_CLK_GATING_CTRL,
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GENCONF_CLK_GATING_CTRL_ND_GATE,
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GENCONF_CLK_GATING_CTRL_ND_GATE);
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regmap_update_bits(sysctrl_base, GENCONF_ND_CLK_CTRL,
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GENCONF_ND_CLK_CTRL_EN,
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GENCONF_ND_CLK_CTRL_EN);
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}
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/* Configure the DMA if appropriate */
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@ -2018,6 +2018,7 @@ static const struct spi_nor_manufacturer *manufacturers[] = {
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static const struct flash_info spi_nor_generic_flash = {
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.name = "spi-nor-generic",
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.n_banks = 1,
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/*
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* JESD216 rev A doesn't specify the page size, therefore we need a
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* sane default.
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@ -2921,7 +2922,8 @@ static void spi_nor_late_init_params(struct spi_nor *nor)
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if (nor->flags & SNOR_F_HAS_LOCK && !nor->params->locking_ops)
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spi_nor_init_default_locking_ops(nor);
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nor->params->bank_size = div64_u64(nor->params->size, nor->info->n_banks);
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if (nor->info->n_banks > 1)
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params->bank_size = div64_u64(params->size, nor->info->n_banks);
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}
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/**
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@ -2987,6 +2989,7 @@ static void spi_nor_init_default_params(struct spi_nor *nor)
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/* Set SPI NOR sizes. */
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params->writesize = 1;
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params->size = (u64)info->sector_size * info->n_sectors;
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params->bank_size = params->size;
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params->page_size = info->page_size;
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if (!(info->flags & SPI_NOR_NO_FR)) {
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@ -361,7 +361,7 @@ static int cypress_nor_determine_addr_mode_by_sr1(struct spi_nor *nor,
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*/
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static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor)
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{
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struct spi_mem_op op;
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struct spi_mem_op op = {};
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u8 addr_mode;
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int ret;
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@ -492,7 +492,7 @@ s25fs256t_post_bfpt_fixup(struct spi_nor *nor,
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const struct sfdp_parameter_header *bfpt_header,
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const struct sfdp_bfpt *bfpt)
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{
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struct spi_mem_op op;
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struct spi_mem_op op = {};
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int ret;
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ret = cypress_nor_set_addr_mode_nbytes(nor);
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