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fbdev: imxfb: use BIT, FIELD_{GET,PREP} and GENMASK macros
Replace opencoded masking and shifting, with BIT(), GENMASK(), FIELD_GET() and FIELD_PREP() macros. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Helge Deller <deller@gmx.de>
This commit is contained in:
Dario Binacchi
Helge Deller
parent
b85f173679
commit
b0e05872f7
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@ -34,6 +34,7 @@
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#include <linux/math64.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/bitfield.h>
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#include <linux/regulator/consumer.h>
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@ -58,48 +59,49 @@ struct imx_fb_videomode {
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#define LCDC_SSA 0x00
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#define LCDC_SIZE 0x04
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#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
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#define SIZE_XMAX_MASK GENMASK(25, 20)
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#define YMAX_MASK_IMX1 0x1ff
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#define YMAX_MASK_IMX21 0x3ff
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#define YMAX_MASK_IMX1 GENMASK(8, 0)
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#define YMAX_MASK_IMX21 GENMASK(9, 0)
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#define LCDC_VPW 0x08
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#define VPW_VPW(x) ((x) & 0x3ff)
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#define VPW_VPW_MASK GENMASK(9, 0)
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#define LCDC_CPOS 0x0C
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#define CPOS_CC1 (1<<31)
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#define CPOS_CC0 (1<<30)
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#define CPOS_OP (1<<28)
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#define CPOS_CXP(x) (((x) & 3ff) << 16)
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#define CPOS_CC1 BIT(31)
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#define CPOS_CC0 BIT(30)
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#define CPOS_OP BIT(28)
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#define CPOS_CXP_MASK GENMASK(25, 16)
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#define LCDC_LCWHB 0x10
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#define LCWHB_BK_EN (1<<31)
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#define LCWHB_CW(w) (((w) & 0x1f) << 24)
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#define LCWHB_CH(h) (((h) & 0x1f) << 16)
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#define LCWHB_BD(x) ((x) & 0xff)
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#define LCWHB_BK_EN BIT(31)
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#define LCWHB_CW_MASK GENMASK(28, 24)
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#define LCWHB_CH_MASK GENMASK(20, 16)
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#define LCWHB_BD_MASK GENMASK(7, 0)
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#define LCDC_LCHCC 0x14
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#define LCDC_PCR 0x18
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#define PCR_TFT (1 << 31)
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#define PCR_COLOR (1 << 30)
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#define PCR_BPIX_8 (3 << 25)
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#define PCR_BPIX_12 (4 << 25)
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#define PCR_BPIX_16 (5 << 25)
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#define PCR_BPIX_18 (6 << 25)
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#define PCR_TFT BIT(31)
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#define PCR_COLOR BIT(30)
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#define PCR_BPIX_MASK GENMASK(27, 25)
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#define PCR_BPIX_8 3
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#define PCR_BPIX_12 4
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#define PCR_BPIX_16 5
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#define PCR_BPIX_18 6
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#define LCDC_HCR 0x1C
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#define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
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#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
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#define HCR_H_WAIT_2(x) ((x) & 0xff)
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#define HCR_H_WIDTH_MASK GENMASK(31, 26)
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#define HCR_H_WAIT_1_MASK GENMASK(15, 8)
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#define HCR_H_WAIT_2_MASK GENMASK(7, 0)
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#define LCDC_VCR 0x20
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#define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
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#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
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#define VCR_V_WAIT_2(x) ((x) & 0xff)
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#define VCR_V_WIDTH_MASK GENMASK(31, 26)
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#define VCR_V_WAIT_1_MASK GENMASK(15, 8)
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#define VCR_V_WAIT_2_MASK GENMASK(7, 0)
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#define LCDC_POS 0x24
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#define POS_POS(x) ((x) & 1f)
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#define POS_POS_MASK GENMASK(4, 0)
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#define LCDC_LSCR1 0x28
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/* bit fields in imxfb.h */
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@ -112,24 +114,24 @@ struct imx_fb_videomode {
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#define LCDC_RMCR 0x34
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#define RMCR_LCDC_EN_MX1 (1<<1)
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#define RMCR_LCDC_EN_MX1 BIT(1)
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#define RMCR_SELF_REF (1<<0)
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#define RMCR_SELF_REF BIT(0)
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#define LCDC_LCDICR 0x38
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#define LCDICR_INT_SYN (1<<2)
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#define LCDICR_INT_CON (1)
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#define LCDICR_INT_SYN BIT(2)
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#define LCDICR_INT_CON BIT(0)
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#define LCDC_LCDISR 0x40
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#define LCDISR_UDR_ERR (1<<3)
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#define LCDISR_ERR_RES (1<<2)
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#define LCDISR_EOF (1<<1)
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#define LCDISR_BOF (1<<0)
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#define LCDISR_UDR_ERR BIT(3)
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#define LCDISR_ERR_RES BIT(2)
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#define LCDISR_EOF BIT(1)
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#define LCDISR_BOF BIT(0)
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#define IMXFB_LSCR1_DEFAULT 0x00120300
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#define LCDC_LAUSCR 0x80
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#define LAUSCR_AUS_MODE (1<<31)
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#define LAUSCR_AUS_MODE BIT(31)
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/* Used fb-mode. Can be set on kernel command line, therefore file-static. */
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static const char *fb_mode;
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@ -420,15 +422,15 @@ static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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switch (var->bits_per_pixel) {
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case 32:
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pcr |= PCR_BPIX_18;
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pcr |= FIELD_PREP(PCR_BPIX_MASK, PCR_BPIX_18);
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rgb = &def_rgb_18;
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break;
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case 16:
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default:
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if (is_imx1_fb(fbi))
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pcr |= PCR_BPIX_12;
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pcr |= FIELD_PREP(PCR_BPIX_MASK, PCR_BPIX_12);
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else
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pcr |= PCR_BPIX_16;
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pcr |= FIELD_PREP(PCR_BPIX_MASK, PCR_BPIX_16);
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if (imxfb_mode->pcr & PCR_TFT)
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rgb = &def_rgb_16_tft;
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@ -436,7 +438,7 @@ static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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rgb = &def_rgb_16_stn;
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break;
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case 8:
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pcr |= PCR_BPIX_8;
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pcr |= FIELD_PREP(PCR_BPIX_MASK, PCR_BPIX_8);
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rgb = &def_rgb_8;
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break;
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}
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@ -520,7 +522,7 @@ static int imxfb_enable_controller(struct imxfb_info *fbi)
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writel(fbi->map_dma, fbi->regs + LCDC_SSA);
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/* panning offset 0 (0 pixel offset) */
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writel(0x00000000, fbi->regs + LCDC_POS);
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writel(FIELD_PREP(POS_POS_MASK, 0), fbi->regs + LCDC_POS);
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/* disable hardware cursor */
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writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
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@ -654,21 +656,24 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
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#endif
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/* physical screen start address */
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writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
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fbi->regs + LCDC_VPW);
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writel(FIELD_PREP(VPW_VPW_MASK,
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var->xres * var->bits_per_pixel / 8 / 4),
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fbi->regs + LCDC_VPW);
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writel(HCR_H_WIDTH(var->hsync_len - 1) |
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HCR_H_WAIT_1(var->right_margin - 1) |
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HCR_H_WAIT_2(var->left_margin - left_margin_low),
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fbi->regs + LCDC_HCR);
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writel(FIELD_PREP(HCR_H_WIDTH_MASK, var->hsync_len - 1) |
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FIELD_PREP(HCR_H_WAIT_1_MASK, var->right_margin - 1) |
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FIELD_PREP(HCR_H_WAIT_2_MASK,
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var->left_margin - left_margin_low),
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fbi->regs + LCDC_HCR);
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writel(VCR_V_WIDTH(var->vsync_len) |
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VCR_V_WAIT_1(var->lower_margin) |
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VCR_V_WAIT_2(var->upper_margin),
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fbi->regs + LCDC_VCR);
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writel(FIELD_PREP(VCR_V_WIDTH_MASK, var->vsync_len) |
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FIELD_PREP(VCR_V_WAIT_1_MASK, var->lower_margin) |
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FIELD_PREP(VCR_V_WAIT_2_MASK, var->upper_margin),
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fbi->regs + LCDC_VCR);
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writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
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fbi->regs + LCDC_SIZE);
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writel(FIELD_PREP(SIZE_XMAX_MASK, var->xres >> 4) |
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(var->yres & ymax_mask),
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fbi->regs + LCDC_SIZE);
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writel(fbi->pcr, fbi->regs + LCDC_PCR);
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if (fbi->pwmr)
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