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dt-bindings: gpio: brcm,kona-gpio: convert to YAML
Convert Broadcom Kona family GPIO controller bindings to DT schema. Changes during conversion: - add used, but previously undocumented SoC-specific compatibles Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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Broadcom Kona Family GPIO
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=========================
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This GPIO driver is used in the following Broadcom SoCs:
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BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
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The Broadcom GPIO Controller IP can be configured prior to synthesis to
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support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The
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GPIO controller only supports edge, not level, triggering of interrupts.
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Required properties
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-------------------
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- compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio"
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- reg: Physical base address and length of the controller's registers.
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- interrupts: The interrupt outputs from the controller. There is one GPIO
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interrupt per GPIO bank. The number of interrupts listed depends on the
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number of GPIO banks on the SoC. The interrupts must be ordered by bank,
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starting with bank 0. There is always a 1:1 mapping between banks and
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IRQs.
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- #gpio-cells: Should be <2>. The first cell is the pin number, the second
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cell is used to specify optional parameters:
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- bit 0 specifies polarity (0 for normal, 1 for inverted)
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See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
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- #interrupt-cells: Should be <2>. The first cell is the GPIO number. The
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second cell is used to specify flags. The following subset of flags is
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supported:
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- trigger type (bits[1:0]):
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1 = low-to-high edge triggered.
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2 = high-to-low edge triggered.
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3 = low-to-high or high-to-low edge triggered
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Valid values are 1, 2, 3
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See also .../devicetree/bindings/interrupt-controller/interrupts.txt.
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- gpio-controller: Marks the device node as a GPIO controller.
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- interrupt-controller: Marks the device node as an interrupt controller.
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Example:
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gpio: gpio@35003000 {
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compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
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reg = <0x35003000 0x800>;
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interrupts =
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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100
Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml
Normal file
100
Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml
Normal file
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@ -0,0 +1,100 @@
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/brcm,kona-gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Broadcom Kona family GPIO controller
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description:
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The Broadcom GPIO Controller IP can be configured prior to synthesis to
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support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The
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GPIO controller only supports edge, not level, triggering of interrupts.
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maintainers:
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- Ray Jui <rjui@broadcom.com>
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properties:
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compatible:
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items:
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- enum:
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- brcm,bcm11351-gpio
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- brcm,bcm21664-gpio
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- brcm,bcm23550-gpio
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- const: brcm,kona-gpio
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reg:
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maxItems: 1
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interrupts:
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minItems: 4
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maxItems: 6
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description:
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The interrupt outputs from the controller. There is one GPIO interrupt
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per GPIO bank. The number of interrupts listed depends on the number of
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GPIO banks on the SoC. The interrupts must be ordered by bank, starting
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with bank 0. There is always a 1:1 mapping between banks and IRQs.
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'#gpio-cells':
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const: 2
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'#interrupt-cells':
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const: 2
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gpio-controller: true
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interrupt-controller: true
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required:
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- compatible
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- reg
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- interrupts
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- '#gpio-cells'
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- '#interrupt-cells'
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- gpio-controller
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- interrupt-controller
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: brcm,bcm11351-gpio
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then:
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properties:
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interrupts:
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minItems: 6
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- if:
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properties:
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compatible:
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contains:
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enum:
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- brcm,bcm21664-gpio
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- brcm,bcm23550-gpio
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then:
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properties:
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interrupts:
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maxItems: 4
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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gpio@35003000 {
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compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
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reg = <0x35003000 0x800>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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};
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...
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@ -4187,7 +4187,7 @@ BROADCOM KONA GPIO DRIVER
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M: Ray Jui <rjui@broadcom.com>
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R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>
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S: Supported
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F: Documentation/devicetree/bindings/gpio/brcm,kona-gpio.txt
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F: Documentation/devicetree/bindings/gpio/brcm,kona-gpio.yaml
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F: drivers/gpio/gpio-bcm-kona.c
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BROADCOM MPI3 STORAGE CONTROLLER DRIVER
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