From b0c33de198c0038882ba68ab7f68a4115fb74050 Mon Sep 17 00:00:00 2001 From: Simon Xue Date: Thu, 30 Dec 2021 09:24:35 +0800 Subject: [PATCH] soc: rockchip: sip: support get ddr map information Change-Id: I3d96443d8cdfbd303d0b2dddaae04d508b2ce5f2 Signed-off-by: Simon Xue --- drivers/firmware/rockchip_sip.c | 30 +++++++++++++++++++++++++++ include/linux/rockchip/rockchip_sip.h | 16 ++++++++++++++ include/soc/rockchip/rockchip_sip.h | 1 + 3 files changed, 47 insertions(+) diff --git a/drivers/firmware/rockchip_sip.c b/drivers/firmware/rockchip_sip.c index 4b00f33f3a05..af98657bb83e 100644 --- a/drivers/firmware/rockchip_sip.c +++ b/drivers/firmware/rockchip_sip.c @@ -24,6 +24,7 @@ #include #include #include +#include #ifdef CONFIG_64BIT #define PSCI_FN_NATIVE(version, name) PSCI_##version##_FN64_##name @@ -205,6 +206,35 @@ struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2) } EXPORT_SYMBOL_GPL(sip_smc_bus_config); +struct dram_addrmap_info *sip_smc_get_dram_map(void) +{ + struct arm_smccc_res res; + static struct dram_addrmap_info *map; + + if (map) + return map; + + /* Request share memory size 4KB */ + res = sip_smc_request_share_mem(1, SHARE_PAGE_TYPE_DDR_ADDRMAP); + if (res.a0 != 0) { + pr_err("no ATF memory for init\n"); + return NULL; + } + + map = (struct dram_addrmap_info *)res.a1; + + res = sip_smc_dram(SHARE_PAGE_TYPE_DDR_ADDRMAP, 0, + ROCKCHIP_SIP_CONFIG_DRAM_ADDRMAP_GET); + if (res.a0) { + pr_err("rockchip_sip_config_dram_init error:%lx\n", res.a0); + map = NULL; + return NULL; + } + + return map; +} +EXPORT_SYMBOL_GPL(sip_smc_get_dram_map); + struct arm_smccc_res sip_smc_lastlog_request(void) { struct arm_smccc_res res; diff --git a/include/linux/rockchip/rockchip_sip.h b/include/linux/rockchip/rockchip_sip.h index 64a3d4f9f339..d7155ebe3a67 100644 --- a/include/linux/rockchip/rockchip_sip.h +++ b/include/linux/rockchip/rockchip_sip.h @@ -109,6 +109,16 @@ /* wakeup state */ #define REMOTECTL_PWRKEY_WAKEUP 0xdeadbeaf +struct dram_addrmap_info { + u64 ch_mask[2]; + u64 bk_mask[4]; + u64 bg_mask[2]; + u64 cs_mask[2]; + u32 reserved[20]; + u32 bank_bit_first; + u32 bank_bit_mask; +}; + enum { FIRMWARE_NONE, FIRMWARE_TEE_32BIT, @@ -125,6 +135,7 @@ typedef enum { SHARE_PAGE_TYPE_DDRDBG, SHARE_PAGE_TYPE_DDRECC, SHARE_PAGE_TYPE_DDRFSP, + SHARE_PAGE_TYPE_DDR_ADDRMAP, SHARE_PAGE_TYPE_LAST_LOG, SHARE_PAGE_TYPE_MAX, } share_page_type_t; @@ -153,6 +164,7 @@ int sip_smc_remotectl_config(u32 func, u32 data); int sip_smc_secure_reg_write(u32 addr_phy, u32 val); u32 sip_smc_secure_reg_read(u32 addr_phy); struct arm_smccc_res sip_smc_bus_config(u32 arg0, u32 arg1, u32 arg2); +struct dram_addrmap_info *sip_smc_get_dram_map(void); /***************************fiq debugger **************************************/ void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu); @@ -229,6 +241,10 @@ static inline int sip_smc_soc_bus_div(u32 arg0, u32 arg1, u32 arg2) { return 0; } +static inline struct dram_addrmap_info *sip_smc_get_dram_map(void) +{ + return NULL; +} /***************************fiq debugger **************************************/ static inline void sip_fiq_debugger_enable_fiq diff --git a/include/soc/rockchip/rockchip_sip.h b/include/soc/rockchip/rockchip_sip.h index 1be62bb7a68a..4afba01c6628 100644 --- a/include/soc/rockchip/rockchip_sip.h +++ b/include/soc/rockchip/rockchip_sip.h @@ -21,5 +21,6 @@ #define ROCKCHIP_SIP_CONFIG_DRAM_DEBUG 0x0b #define ROCKCHIP_SIP_CONFIG_MCU_START 0x0c #define ROCKCHIP_SIP_CONFIG_DRAM_GET_FREQ_INFO 0x0e +#define ROCKCHIP_SIP_CONFIG_DRAM_ADDRMAP_GET 0x10 #endif