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KVM: x86/pmu: Elide WRMSRs when loading guest PMCs if values already match

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When loading a mediated PMU state, elide the WRMSRs to load PMCs with the
guest's value if the value in hardware already matches the guest's value.
For the relatively common case where neither the guest nor the host is
actively using the PMU, i.e. when all/many counters are '0', eliding the
WRMSRs reduces the latency of handling VM-Exit by a measurable amount
(WRMSR is significantly more expensive than RDPMC).

As measured by KVM-Unit-Tests' CPUID VM-Exit testcase, this provides a
a ~25% reduction in latency (4k => 3k cycles) on Intel Emerald Rapids,
and a ~13% reduction (6.2k => 5.3k cycles) on AMD Turin.

Cc: Manali Shukla <manali.shukla@amd.com>
Tested-by: Xudong Hao <xudong.hao@intel.com>
Tested-by: Manali Shukla <manali.shukla@amd.com>
Link: https://patch.msgid.link/20251206001720.468579-35-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
This commit is contained in:
Sean Christopherson 2025-12-05 16:17:10 -08:00
parent 860bcb1021
commit b0b6a8d3be
1 changed files with 4 additions and 2 deletions
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6
arch/x86/kvm/pmu.c
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@ -1312,13 +1312,15 @@ static void kvm_pmu_load_guest_pmcs(struct kvm_vcpu *vcpu)
for (i = 0; i < pmu->nr_arch_gp_counters; i++) {
pmc = &pmu->gp_counters[i];
wrmsrl(gp_counter_msr(i), pmc->counter);
if (pmc->counter != rdpmc(i))
wrmsrl(gp_counter_msr(i), pmc->counter);
wrmsrl(gp_eventsel_msr(i), pmc->eventsel_hw);
}
for (i = 0; i < pmu->nr_arch_fixed_counters; i++) {
pmc = &pmu->fixed_counters[i];
wrmsrl(fixed_counter_msr(i), pmc->counter);
if (pmc->counter != rdpmc(INTEL_PMC_FIXED_RDPMC_BASE | i))
wrmsrl(fixed_counter_msr(i), pmc->counter);
}
}