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arm64: dts: qcom: sm6350: change labels to lower-case
DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-8-0505bc7d2c56@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
Bjorn Andersson
parent
dfe312b825
commit
b0864ab227
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@ -45,7 +45,7 @@ cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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CPU0: cpu@0 {
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "qcom,kryo560";
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reg = <0x0 0x0>;
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@ -53,21 +53,21 @@ CPU0: cpu@0 {
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_0>;
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next-level-cache = <&l2_0>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
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power-domains = <&CPU_PD0>;
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power-domains = <&cpu_pd0>;
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_0: l2-cache {
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l2_0: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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next-level-cache = <&L3_0>;
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L3_0: l3-cache {
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next-level-cache = <&l3_0>;
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l3_0: l3-cache {
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compatible = "cache";
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cache-level = <3>;
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cache-unified;
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@ -75,7 +75,7 @@ L3_0: l3-cache {
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};
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};
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CPU1: cpu@100 {
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cpu1: cpu@100 {
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device_type = "cpu";
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compatible = "qcom,kryo560";
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reg = <0x0 0x100>;
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@ -83,24 +83,24 @@ CPU1: cpu@100 {
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_100>;
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next-level-cache = <&l2_100>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
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power-domains = <&CPU_PD1>;
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power-domains = <&cpu_pd1>;
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_100: l2-cache {
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l2_100: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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next-level-cache = <&L3_0>;
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next-level-cache = <&l3_0>;
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};
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};
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CPU2: cpu@200 {
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cpu2: cpu@200 {
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device_type = "cpu";
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compatible = "qcom,kryo560";
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reg = <0x0 0x200>;
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@ -108,24 +108,24 @@ CPU2: cpu@200 {
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_200>;
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next-level-cache = <&l2_200>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
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power-domains = <&CPU_PD2>;
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power-domains = <&cpu_pd2>;
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_200: l2-cache {
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l2_200: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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next-level-cache = <&L3_0>;
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next-level-cache = <&l3_0>;
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};
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};
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CPU3: cpu@300 {
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cpu3: cpu@300 {
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device_type = "cpu";
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compatible = "qcom,kryo560";
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reg = <0x0 0x300>;
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@ -133,24 +133,24 @@ CPU3: cpu@300 {
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_300>;
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next-level-cache = <&l2_300>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
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power-domains = <&CPU_PD3>;
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power-domains = <&cpu_pd3>;
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_300: l2-cache {
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l2_300: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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next-level-cache = <&L3_0>;
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next-level-cache = <&l3_0>;
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};
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};
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CPU4: cpu@400 {
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cpu4: cpu@400 {
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device_type = "cpu";
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compatible = "qcom,kryo560";
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reg = <0x0 0x400>;
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@ -158,24 +158,24 @@ CPU4: cpu@400 {
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_400>;
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next-level-cache = <&l2_400>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
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power-domains = <&CPU_PD4>;
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power-domains = <&cpu_pd4>;
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_400: l2-cache {
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l2_400: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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next-level-cache = <&L3_0>;
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next-level-cache = <&l3_0>;
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};
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};
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CPU5: cpu@500 {
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cpu5: cpu@500 {
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device_type = "cpu";
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compatible = "qcom,kryo560";
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reg = <0x0 0x500>;
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@ -183,24 +183,24 @@ CPU5: cpu@500 {
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <100>;
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next-level-cache = <&L2_500>;
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next-level-cache = <&l2_500>;
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qcom,freq-domain = <&cpufreq_hw 0>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
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power-domains = <&CPU_PD5>;
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power-domains = <&cpu_pd5>;
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_500: l2-cache {
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l2_500: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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next-level-cache = <&L3_0>;
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next-level-cache = <&l3_0>;
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};
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};
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CPU6: cpu@600 {
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cpu6: cpu@600 {
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device_type = "cpu";
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compatible = "qcom,kryo560";
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reg = <0x0 0x600>;
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@ -208,24 +208,24 @@ CPU6: cpu@600 {
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enable-method = "psci";
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capacity-dmips-mhz = <1894>;
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dynamic-power-coefficient = <703>;
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next-level-cache = <&L2_600>;
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next-level-cache = <&l2_600>;
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qcom,freq-domain = <&cpufreq_hw 1>;
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operating-points-v2 = <&cpu6_opp_table>;
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
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power-domains = <&CPU_PD6>;
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power-domains = <&cpu_pd6>;
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_600: l2-cache {
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l2_600: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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next-level-cache = <&L3_0>;
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next-level-cache = <&l3_0>;
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};
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};
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CPU7: cpu@700 {
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cpu7: cpu@700 {
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device_type = "cpu";
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compatible = "qcom,kryo560";
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reg = <0x0 0x700>;
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@ -233,61 +233,61 @@ CPU7: cpu@700 {
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enable-method = "psci";
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capacity-dmips-mhz = <1894>;
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dynamic-power-coefficient = <703>;
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next-level-cache = <&L2_700>;
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next-level-cache = <&l2_700>;
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qcom,freq-domain = <&cpufreq_hw 1>;
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operating-points-v2 = <&cpu6_opp_table>;
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interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
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&clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
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power-domains = <&CPU_PD7>;
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power-domains = <&cpu_pd7>;
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power-domain-names = "psci";
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#cooling-cells = <2>;
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L2_700: l2-cache {
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l2_700: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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cache-unified;
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next-level-cache = <&L3_0>;
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next-level-cache = <&l3_0>;
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};
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};
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&CPU0>;
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cpu = <&cpu0>;
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};
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core1 {
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cpu = <&CPU1>;
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cpu = <&cpu1>;
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};
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core2 {
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cpu = <&CPU2>;
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cpu = <&cpu2>;
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};
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core3 {
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cpu = <&CPU3>;
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cpu = <&cpu3>;
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};
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core4 {
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cpu = <&CPU4>;
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cpu = <&cpu4>;
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};
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core5 {
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cpu = <&CPU5>;
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cpu = <&cpu5>;
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};
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core6 {
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cpu = <&CPU6>;
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cpu = <&cpu6>;
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};
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core7 {
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cpu = <&CPU7>;
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cpu = <&cpu7>;
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};
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};
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};
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domain-idle-states {
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CLUSTER_SLEEP_PC: cluster-sleep-0 {
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cluster_sleep_pc: cluster-sleep-0 {
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compatible = "domain-idle-state";
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arm,psci-suspend-param = <0x41000044>;
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entry-latency-us = <2752>;
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@ -295,7 +295,7 @@ CLUSTER_SLEEP_PC: cluster-sleep-0 {
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min-residency-us = <6118>;
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};
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CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
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cluster_sleep_cx_ret: cluster-sleep-1 {
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compatible = "domain-idle-state";
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arm,psci-suspend-param = <0x41001244>;
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entry-latency-us = <3638>;
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@ -303,7 +303,7 @@ CLUSTER_SLEEP_CX_RET: cluster-sleep-1 {
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min-residency-us = <8467>;
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};
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CLUSTER_AOSS_SLEEP: cluster-sleep-2 {
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cluster_aoss_sleep: cluster-sleep-2 {
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compatible = "domain-idle-state";
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arm,psci-suspend-param = <0x4100b244>;
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entry-latency-us = <3263>;
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@ -315,7 +315,7 @@ CLUSTER_AOSS_SLEEP: cluster-sleep-2 {
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cpu_idle_states: idle-states {
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entry-method = "psci";
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LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
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little_cpu_sleep_0: cpu-sleep-0-0 {
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compatible = "arm,idle-state";
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idle-state-name = "little-power-collapse";
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arm,psci-suspend-param = <0x40000003>;
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@ -325,7 +325,7 @@ LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
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local-timer-stop;
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};
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LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
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little_cpu_sleep_1: cpu-sleep-0-1 {
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compatible = "arm,idle-state";
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idle-state-name = "little-rail-power-collapse";
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arm,psci-suspend-param = <0x40000004>;
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@ -335,7 +335,7 @@ LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
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local-timer-stop;
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};
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BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
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big_cpu_sleep_0: cpu-sleep-1-0 {
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compatible = "arm,idle-state";
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idle-state-name = "big-power-collapse";
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arm,psci-suspend-param = <0x40000003>;
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@ -345,7 +345,7 @@ BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
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local-timer-stop;
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};
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BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
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big_cpu_sleep_1: cpu-sleep-1-1 {
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compatible = "arm,idle-state";
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idle-state-name = "big-rail-power-collapse";
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arm,psci-suspend-param = <0x40000004>;
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@ -504,59 +504,59 @@ psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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CPU_PD0: power-domain-cpu0 {
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cpu_pd0: power-domain-cpu0 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
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power-domains = <&cluster_pd>;
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domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
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};
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CPU_PD1: power-domain-cpu1 {
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cpu_pd1: power-domain-cpu1 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
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power-domains = <&cluster_pd>;
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domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
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};
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CPU_PD2: power-domain-cpu2 {
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cpu_pd2: power-domain-cpu2 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
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power-domains = <&cluster_pd>;
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domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
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};
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CPU_PD3: power-domain-cpu3 {
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cpu_pd3: power-domain-cpu3 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
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power-domains = <&cluster_pd>;
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domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
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};
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CPU_PD4: power-domain-cpu4 {
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cpu_pd4: power-domain-cpu4 {
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#power-domain-cells = <0>;
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power-domains = <&CLUSTER_PD>;
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domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
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power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD5: power-domain-cpu5 {
|
||||
cpu_pd5: power-domain-cpu5 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&LITTLE_CPU_SLEEP_0 &LITTLE_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&little_cpu_sleep_0 &little_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD6: power-domain-cpu6 {
|
||||
cpu_pd6: power-domain-cpu6 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CPU_PD7: power-domain-cpu7 {
|
||||
cpu_pd7: power-domain-cpu7 {
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&BIG_CPU_SLEEP_0 &BIG_CPU_SLEEP_1>;
|
||||
power-domains = <&cluster_pd>;
|
||||
domain-idle-states = <&big_cpu_sleep_0 &big_cpu_sleep_1>;
|
||||
};
|
||||
|
||||
CLUSTER_PD: power-domain-cpu-cluster0 {
|
||||
cluster_pd: power-domain-cpu-cluster0 {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CLUSTER_SLEEP_PC
|
||||
&CLUSTER_SLEEP_CX_RET
|
||||
&CLUSTER_AOSS_SLEEP>;
|
||||
domain-idle-states = <&cluster_sleep_pc
|
||||
&cluster_sleep_cx_ret
|
||||
&cluster_aoss_sleep>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -2777,7 +2777,7 @@ apps_rsc: rsc@18200000 {
|
|||
qcom,drv-id = <2>;
|
||||
qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
|
||||
<WAKE_TCS 3>, <CONTROL_TCS 1>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
power-domains = <&cluster_pd>;
|
||||
|
||||
rpmhcc: clock-controller {
|
||||
compatible = "qcom,sm6350-rpmh-clk";
|
||||
|
|
@ -2954,7 +2954,7 @@ cpu0-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu0_alert0>;
|
||||
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -2979,7 +2979,7 @@ cpu1-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu1_alert0>;
|
||||
cooling-device = <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3004,7 +3004,7 @@ cpu2-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu2_alert0>;
|
||||
cooling-device = <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3029,7 +3029,7 @@ cpu3-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu3_alert0>;
|
||||
cooling-device = <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3054,7 +3054,7 @@ cpu4-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu4_alert0>;
|
||||
cooling-device = <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3079,7 +3079,7 @@ cpu5-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu5_alert0>;
|
||||
cooling-device = <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3104,7 +3104,7 @@ cpu6-left-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu6_left_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3129,7 +3129,7 @@ cpu6-right-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu6_right_alert0>;
|
||||
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3154,7 +3154,7 @@ cpu7-left-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu7_left_alert0>;
|
||||
cooling-device = <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3179,7 +3179,7 @@ cpu7-right-crit {
|
|||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu7_right_alert0>;
|
||||
cooling-device = <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
cooling-device = <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,14 +6,14 @@
|
|||
#include "sm6350.dtsi"
|
||||
|
||||
/* SM7225 uses Kryo 570 instead of Kryo 560 */
|
||||
&CPU0 { compatible = "qcom,kryo570"; };
|
||||
&CPU1 { compatible = "qcom,kryo570"; };
|
||||
&CPU2 { compatible = "qcom,kryo570"; };
|
||||
&CPU3 { compatible = "qcom,kryo570"; };
|
||||
&CPU4 { compatible = "qcom,kryo570"; };
|
||||
&CPU5 { compatible = "qcom,kryo570"; };
|
||||
&CPU6 { compatible = "qcom,kryo570"; };
|
||||
&CPU7 { compatible = "qcom,kryo570"; };
|
||||
&cpu0 { compatible = "qcom,kryo570"; };
|
||||
&cpu1 { compatible = "qcom,kryo570"; };
|
||||
&cpu2 { compatible = "qcom,kryo570"; };
|
||||
&cpu3 { compatible = "qcom,kryo570"; };
|
||||
&cpu4 { compatible = "qcom,kryo570"; };
|
||||
&cpu5 { compatible = "qcom,kryo570"; };
|
||||
&cpu6 { compatible = "qcom,kryo570"; };
|
||||
&cpu7 { compatible = "qcom,kryo570"; };
|
||||
|
||||
&cpu0_opp_table {
|
||||
opp-1804800000 {
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user