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clk: rockchip: rk3368: fix hdmi_cec gate-register
commitfd0c0740faupstream. Fix a typo making the sclk_hdmi_cec access a wrong register to handle its gate. Fixes:3536c97a52("clk: rockchip: add rk3368 clock controller") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: zhangqing <zhangqing@rock-chips.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -442,7 +442,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = {
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GATE(SCLK_HDMI_HDCP, "sclk_hdmi_hdcp", "xin24m", 0,
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RK3368_CLKGATE_CON(4), 13, GFLAGS),
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GATE(SCLK_HDMI_CEC, "sclk_hdmi_cec", "xin32k", 0,
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RK3368_CLKGATE_CON(5), 12, GFLAGS),
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RK3368_CLKGATE_CON(4), 12, GFLAGS),
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COMPOSITE_NODIV(0, "vip_src", mux_pll_src_cpll_gpll_p, 0,
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RK3368_CLKSEL_CON(21), 15, 1, MFLAGS,
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