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drm/mediatek: gamma: Add support for 12-bit LUT
New SoCs, like MT8195, not only may support bigger lookup tables, but have got a different register layout to support bigger precision: support specifying the number of `lut_bits` for each SoC and use it in mtk_gamma_set_common() to perform the right calculations and add support for 12-bit gamma lookup tables. While at it, also reorder the variables in mtk_gamma_set_common() and rename `lut_base` to `lut0_base` to improve readability. Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: CK Hu <ck.hu@mediatek.com> Link: https://patchwork.kernel.org/project/dri-devel/patch/20231012095736.100784-11-angelogioacchino.delregno@collabora.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
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@ -26,17 +26,26 @@
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#define DISP_GAMMA_SIZE_VSIZE GENMASK(12, 0)
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#define DISP_GAMMA_BANK 0x0100
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#define DISP_GAMMA_BANK_BANK GENMASK(1, 0)
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#define DISP_GAMMA_BANK_DATA_MODE BIT(2)
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#define DISP_GAMMA_LUT 0x0700
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#define DISP_GAMMA_LUT1 0x0b00
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/* For 10 bit LUT layout, R/G/B are in the same register */
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#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
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#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
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#define DISP_GAMMA_LUT_10BIT_B GENMASK(9, 0)
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/* For 12 bit LUT layout, R/G are in LUT, B is in LUT1 */
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#define DISP_GAMMA_LUT_12BIT_R GENMASK(11, 0)
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#define DISP_GAMMA_LUT_12BIT_G GENMASK(23, 12)
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#define DISP_GAMMA_LUT_12BIT_B GENMASK(11, 0)
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struct mtk_disp_gamma_data {
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bool has_dither;
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bool lut_diff;
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u16 lut_bank_size;
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u16 lut_size;
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u8 lut_bits;
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};
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/*
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@ -72,28 +81,48 @@ unsigned int mtk_gamma_get_lut_size(struct device *dev)
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return 0;
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}
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/*
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* SoCs supporting 12-bits LUTs are using a new register layout that does
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* always support (by HW) both 12-bits and 10-bits LUT but, on those, we
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* ignore the support for 10-bits in this driver and always use 12-bits.
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*
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* Summarizing:
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* - SoC HW support 9/10-bits LUT only
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* - Old register layout
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* - 10-bits LUT supported
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* - 9-bits LUT not supported
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* - SoC HW support both 10/12bits LUT
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* - New register layout
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* - 12-bits LUT supported
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* - 10-its LUT not supported
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*/
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void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
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{
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struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
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unsigned int i;
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struct drm_color_lut *lut;
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void __iomem *lut_base;
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u32 cfg_val, lbank_val, word;
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void __iomem *lut0_base = gamma->regs + DISP_GAMMA_LUT;
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void __iomem *lut1_base = gamma->regs + DISP_GAMMA_LUT1;
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u32 cfg_val, data_mode, lbank_val, word[2];
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u8 lut_bits = gamma->data->lut_bits;
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int cur_bank, num_lut_banks;
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struct drm_color_lut *lut;
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unsigned int i;
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/* If there's no gamma lut there's nothing to do here. */
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if (!state->gamma_lut)
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return;
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num_lut_banks = gamma->data->lut_size / gamma->data->lut_bank_size;
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lut_base = gamma->regs + DISP_GAMMA_LUT;
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lut = (struct drm_color_lut *)state->gamma_lut->data;
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/* Switch to 12 bits data mode if supported */
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data_mode = FIELD_PREP(DISP_GAMMA_BANK_DATA_MODE, !!(lut_bits == 12));
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for (cur_bank = 0; cur_bank < num_lut_banks; cur_bank++) {
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/* Switch gamma bank and set data mode before writing LUT */
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if (num_lut_banks > 1) {
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lbank_val = FIELD_PREP(DISP_GAMMA_BANK_BANK, cur_bank);
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lbank_val |= data_mode;
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writel(lbank_val, gamma->regs + DISP_GAMMA_BANK);
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}
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@ -101,29 +130,43 @@ void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
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int n = cur_bank * gamma->data->lut_bank_size + i;
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struct drm_color_lut diff, hwlut;
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hwlut.red = drm_color_lut_extract(lut[n].red, 10);
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hwlut.green = drm_color_lut_extract(lut[n].green, 10);
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hwlut.blue = drm_color_lut_extract(lut[n].blue, 10);
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hwlut.red = drm_color_lut_extract(lut[n].red, lut_bits);
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hwlut.green = drm_color_lut_extract(lut[n].green, lut_bits);
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hwlut.blue = drm_color_lut_extract(lut[n].blue, lut_bits);
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if (!gamma->data->lut_diff || (i % 2 == 0)) {
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word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
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word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
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word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
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if (lut_bits == 12) {
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word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, hwlut.red);
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word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, hwlut.green);
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word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, hwlut.blue);
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} else {
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word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, hwlut.red);
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word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, hwlut.green);
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word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, hwlut.blue);
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}
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} else {
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diff.red = lut[n].red - lut[n - 1].red;
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diff.red = drm_color_lut_extract(diff.red, 10);
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diff.red = drm_color_lut_extract(diff.red, lut_bits);
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diff.green = lut[n].green - lut[n - 1].green;
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diff.green = drm_color_lut_extract(diff.green, 10);
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diff.green = drm_color_lut_extract(diff.green, lut_bits);
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diff.blue = lut[n].blue - lut[n - 1].blue;
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diff.blue = drm_color_lut_extract(diff.blue, 10);
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diff.blue = drm_color_lut_extract(diff.blue, lut_bits);
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word = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
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word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
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word |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
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if (lut_bits == 12) {
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word[0] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_R, diff.red);
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word[0] |= FIELD_PREP(DISP_GAMMA_LUT_12BIT_G, diff.green);
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word[1] = FIELD_PREP(DISP_GAMMA_LUT_12BIT_B, diff.blue);
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} else {
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word[0] = FIELD_PREP(DISP_GAMMA_LUT_10BIT_R, diff.red);
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word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_G, diff.green);
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word[0] |= FIELD_PREP(DISP_GAMMA_LUT_10BIT_B, diff.blue);
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}
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}
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writel(word, lut_base + i * 4);
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writel(word[0], lut0_base + i * 4);
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if (lut_bits == 12)
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writel(word[1], lut1_base + i * 4);
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}
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}
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@ -229,11 +272,13 @@ static void mtk_disp_gamma_remove(struct platform_device *pdev)
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static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
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.has_dither = true,
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.lut_bank_size = 512,
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.lut_bits = 10,
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.lut_size = 512,
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};
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static const struct mtk_disp_gamma_data mt8183_gamma_driver_data = {
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.lut_bank_size = 512,
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.lut_bits = 10,
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.lut_diff = true,
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.lut_size = 512,
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};
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