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Reset controller fixes for v4.17
Fix the USB3 reset (offset 0x200c, bit 5) on Uniphier LD20. It was incorrectly labeled as GIO reset. This reset line is not yet used in uniphier-ld20.dtsi. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCWvmr9RcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwJlYAP4008mrJKjGTLMy/GZOwMIpmdm3 7qYxoD3rsgyby0Cn+QEAhyfrNAXHmcAwXxuprPGB1Z2rAmN23KqnpoqiVxhn6AQ= =4LaA -----END PGP SIGNATURE----- Merge tag 'reset-fixes-for-4.17' of git://git.pengutronix.de/pza/linux into fixes Reset controller fixes for v4.17 Fix the USB3 reset (offset 0x200c, bit 5) on Uniphier LD20. It was incorrectly labeled as GIO reset. This reset line is not yet used in uniphier-ld20.dtsi. * tag 'reset-fixes-for-4.17' of git://git.pengutronix.de/pza/linux: reset: uniphier: fix USB clock line for LD20 Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
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@ -110,7 +110,7 @@ static const struct uniphier_reset_data uniphier_ld20_sys_reset_data[] = {
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UNIPHIER_RESETX(4, 0x200c, 2), /* eMMC */
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UNIPHIER_RESETX(6, 0x200c, 6), /* Ether */
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UNIPHIER_RESETX(8, 0x200c, 8), /* STDMAC (HSC) */
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UNIPHIER_RESETX(12, 0x200c, 5), /* GIO (PCIe, USB3) */
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UNIPHIER_RESETX(14, 0x200c, 5), /* USB30 */
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UNIPHIER_RESETX(16, 0x200c, 12), /* USB30-PHY0 */
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UNIPHIER_RESETX(17, 0x200c, 13), /* USB30-PHY1 */
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UNIPHIER_RESETX(18, 0x200c, 14), /* USB30-PHY2 */
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@ -127,8 +127,8 @@ static const struct uniphier_reset_data uniphier_pxs3_sys_reset_data[] = {
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UNIPHIER_RESETX(6, 0x200c, 9), /* Ether0 */
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UNIPHIER_RESETX(7, 0x200c, 10), /* Ether1 */
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UNIPHIER_RESETX(8, 0x200c, 12), /* STDMAC */
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UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link (GIO0) */
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UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link (GIO1) */
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UNIPHIER_RESETX(12, 0x200c, 4), /* USB30 link */
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UNIPHIER_RESETX(13, 0x200c, 5), /* USB31 link */
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UNIPHIER_RESETX(16, 0x200c, 16), /* USB30-PHY0 */
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UNIPHIER_RESETX(17, 0x200c, 18), /* USB30-PHY1 */
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UNIPHIER_RESETX(18, 0x200c, 20), /* USB30-PHY2 */
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