diff --git a/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts b/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts index 0e348c5cf7df..458f1bc6f5d0 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts +++ b/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts @@ -143,6 +143,7 @@ &usb { /* TODO: Replace these once PMIC is implemented */ vdd10-supply = <®_dummy>; vdd33-supply = <®_dummy>; + status = "okay"; }; @@ -161,6 +162,7 @@ &usb_hsphy { /* TODO: Replace these once PMIC is implemented */ vdda12-supply = <®_dummy>; vdd-supply = <®_dummy>; + status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi index 59662f9bdb98..b1c134f22324 100644 --- a/arch/arm64/boot/dts/exynos/exynos2200.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi @@ -266,6 +266,7 @@ mct_peris: timer@10040000 { , , ; + status = "disabled"; }; @@ -326,6 +327,7 @@ usi4: usi@105000c0 { <&cmu_peric0 CLK_DOUT_PERIC0_USI04>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric0 0x1024>; + status = "disabled"; hsi2c_8: i2c@10500000 { @@ -340,6 +342,7 @@ hsi2c_8: i2c@10500000 { interrupts = ; pinctrl-0 = <&hsi2c8_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -353,6 +356,7 @@ serial_6: serial@10500000 { pinctrl-0 = <&uart6_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -368,6 +372,7 @@ usi4_i2c: usi@105100c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric0 0x1024>; + status = "disabled"; hsi2c_9: i2c@10510000 { @@ -382,6 +387,7 @@ hsi2c_9: i2c@10510000 { interrupts = ; pinctrl-0 = <&hsi2c9_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -418,6 +424,7 @@ usi7: usi@109000c0 { <&cmu_peric1 CLK_DOUT_PERIC1_USI07>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric1 0x2030>; + status = "disabled"; hsi2c_14: i2c@10900000 { @@ -432,6 +439,7 @@ hsi2c_14: i2c@10900000 { interrupts = ; pinctrl-0 = <&hsi2c14_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -445,6 +453,7 @@ serial_9: serial@10900000 { pinctrl-0 = <&uart9_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -460,6 +469,7 @@ usi7_i2c: usi@109100c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric1 0x2034>; + status = "disabled"; hsi2c_15: i2c@10910000 { @@ -474,6 +484,7 @@ hsi2c_15: i2c@10910000 { interrupts = ; pinctrl-0 = <&hsi2c15_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -488,6 +499,7 @@ usi8: usi@109200c0 { <&cmu_peric1 CLK_DOUT_PERIC1_USI08>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric1 0x2038>; + status = "disabled"; hsi2c_16: i2c@10920000 { @@ -502,6 +514,7 @@ hsi2c_16: i2c@10920000 { interrupts = ; pinctrl-0 = <&hsi2c16_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -515,6 +528,7 @@ serial_10: serial@10920000 { pinctrl-0 = <&uart10_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -530,6 +544,7 @@ usi8_i2c: usi@109300c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric1 0x203c>; + status = "disabled"; hsi2c_17: i2c@10930000 { @@ -544,6 +559,7 @@ hsi2c_17: i2c@10930000 { interrupts = ; pinctrl-0 = <&hsi2c17_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -558,6 +574,7 @@ usi9: usi@109400c0 { <&cmu_peric1 CLK_DOUT_PERIC1_USI09>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric1 0x2040>; + status = "disabled"; hsi2c_18: i2c@10940000 { @@ -572,6 +589,7 @@ hsi2c_18: i2c@10940000 { interrupts = ; pinctrl-0 = <&hsi2c18_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -585,6 +603,7 @@ serial_11: serial@10940000 { pinctrl-0 = <&uart11_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -600,6 +619,7 @@ usi9_i2c: usi@109500c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric1 0x2044>; + status = "disabled"; hsi2c_19: i2c@10950000 { @@ -614,6 +634,7 @@ hsi2c_19: i2c@10950000 { interrupts = ; pinctrl-0 = <&hsi2c19_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -628,6 +649,7 @@ usi10: usi@109600c0 { <&cmu_peric1 CLK_DOUT_PERIC1_USI10>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric1 0x2048>; + status = "disabled"; hsi2c_20: i2c@10960000 { @@ -642,6 +664,7 @@ hsi2c_20: i2c@10960000 { interrupts = ; pinctrl-0 = <&hsi2c20_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -655,6 +678,7 @@ serial_12: serial@10960000 { pinctrl-0 = <&uart12_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -670,6 +694,7 @@ usi10_i2c: usi@109700c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric1 0x204c>; + status = "disabled"; hsi2c_21: i2c@10970000 { @@ -684,6 +709,7 @@ hsi2c_21: i2c@10970000 { interrupts = ; pinctrl-0 = <&hsi2c21_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -821,6 +847,7 @@ usi0: usi@11d000c0 { <&cmu_peric2 CLK_DOUT_PERIC2_USI00>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric2 0x2000>; + status = "disabled"; hsi2c_0: i2c@11d00000 { @@ -835,6 +862,7 @@ hsi2c_0: i2c@11d00000 { interrupts = ; pinctrl-0 = <&hsi2c0_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -848,6 +876,7 @@ serial_2: serial@11d00000 { pinctrl-0 = <&uart2_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -863,6 +892,7 @@ usi0_i2c: usi@11d100c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric2 0x2004>; + status = "disabled"; hsi2c_1: i2c@11d10000 { @@ -877,6 +907,7 @@ hsi2c_1: i2c@11d10000 { interrupts = ; pinctrl-0 = <&hsi2c1_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -891,6 +922,7 @@ usi1: usi@11d200c0 { <&cmu_peric2 CLK_DOUT_PERIC2_USI01>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric2 0x2008>; + status = "disabled"; hsi2c_2: i2c@11d20000 { @@ -905,6 +937,7 @@ hsi2c_2: i2c@11d20000 { interrupts = ; pinctrl-0 = <&hsi2c2_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -918,6 +951,7 @@ serial_3: serial@11d20000 { pinctrl-0 = <&uart3_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -933,6 +967,7 @@ usi1_i2c: usi@11d300c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric2 0x200c>; + status = "disabled"; hsi2c_3: i2c@11d30000 { @@ -947,6 +982,7 @@ hsi2c_3: i2c@11d30000 { interrupts = ; pinctrl-0 = <&hsi2c3_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -961,6 +997,7 @@ usi2: usi@11d400c0 { <&cmu_peric2 CLK_DOUT_PERIC2_USI02>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric2 0x2010>; + status = "disabled"; hsi2c_4: i2c@11d40000 { @@ -975,6 +1012,7 @@ hsi2c_4: i2c@11d40000 { interrupts = ; pinctrl-0 = <&hsi2c4_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -988,6 +1026,7 @@ serial_4: serial@11d40000 { pinctrl-0 = <&uart4_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <256>; + status = "disabled"; }; }; @@ -1003,6 +1042,7 @@ usi2_i2c: usi@11d500c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric2 0x2014>; + status = "disabled"; hsi2c_5: i2c@11d50000 { @@ -1017,6 +1057,7 @@ hsi2c_5: i2c@11d50000 { interrupts = ; pinctrl-0 = <&hsi2c5_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1031,6 +1072,7 @@ usi3: usi@11d600c0 { <&cmu_peric2 CLK_DOUT_PERIC2_USI03>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric2 0x2018>; + status = "disabled"; hsi2c_6: i2c@11d60000 { @@ -1045,6 +1087,7 @@ hsi2c_6: i2c@11d60000 { interrupts = ; pinctrl-0 = <&hsi2c6_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1058,6 +1101,7 @@ serial_5: serial@11d60000 { pinctrl-0 = <&uart5_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <256>; + status = "disabled"; }; }; @@ -1073,6 +1117,7 @@ usi3_i2c: usi@11d700c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric2 0x201c>; + status = "disabled"; hsi2c_7: i2c@11d70000 { @@ -1087,6 +1132,7 @@ hsi2c_7: i2c@11d70000 { interrupts = ; pinctrl-0 = <&hsi2c7_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1102,6 +1148,7 @@ usi5_i2c: usi@11d800c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric2 0x102c>; + status = "disabled"; hsi2c_11: i2c@11d80000 { @@ -1116,6 +1163,7 @@ hsi2c_11: i2c@11d80000 { interrupts = ; pinctrl-0 = <&hsi2c11_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1131,6 +1179,7 @@ usi6_i2c: usi@11d900c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric2 0x1004>; + status = "disabled"; hsi2c_13: i2c@11d90000 { @@ -1145,6 +1194,7 @@ hsi2c_13: i2c@11d90000 { interrupts = ; pinctrl-0 = <&hsi2c13_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1159,6 +1209,7 @@ usi11: usi@11da00c0 { <&cmu_peric2 CLK_DOUT_PERIC2_USI11>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric2 0x1058>; + status = "disabled"; hsi2c_22: i2c@11da0000 { @@ -1173,6 +1224,7 @@ hsi2c_22: i2c@11da0000 { interrupts = ; pinctrl-0 = <&hsi2c22_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1186,6 +1238,7 @@ serial_13: serial@11da0000 { pinctrl-0 = <&uart13_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1201,6 +1254,7 @@ usi11_i2c: usi@11db00c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_peric2 0x105c>; + status = "disabled"; hsi2c_23: i2c@11db0000 { @@ -1215,6 +1269,7 @@ hsi2c_23: i2c@11db0000 { interrupts = ; pinctrl-0 = <&hsi2c23_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1229,6 +1284,7 @@ usi5: usi@11dd00c0 { <&cmu_peric2 CLK_DOUT_PERIC2_USI05>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric2 0x117c>; + status = "disabled"; hsi2c_10: i2c@11dd0000 { @@ -1243,6 +1299,7 @@ hsi2c_10: i2c@11dd0000 { interrupts = ; pinctrl-0 = <&hsi2c10_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1256,6 +1313,7 @@ serial_7: serial@11dd0000 { pinctrl-0 = <&uart7_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <256>; + status = "disabled"; }; }; @@ -1270,6 +1328,7 @@ usi6: usi@11de00c0 { <&cmu_peric2 CLK_DOUT_PERIC2_USI06>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_peric2 0x1180>; + status = "disabled"; hsi2c_12: i2c@11de0000 { @@ -1284,6 +1343,7 @@ hsi2c_12: i2c@11de0000 { interrupts = ; pinctrl-0 = <&hsi2c12_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1297,6 +1357,7 @@ serial_8: serial@11de0000 { pinctrl-0 = <&uart8_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1338,6 +1399,7 @@ usi_cmgp0: usi@14f000c0 { <&cmu_cmgp CLK_DOUT_CMGP_USI0>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_cmgp 0x2000>; + status = "disabled"; hsi2c_24: i2c@14f00000 { @@ -1352,6 +1414,7 @@ hsi2c_24: i2c@14f00000 { interrupts = ; pinctrl-0 = <&hsi2c24_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1365,6 +1428,7 @@ serial_14: serial@14f00000 { pinctrl-0 = <&uart14_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1380,6 +1444,7 @@ usi_i2c_cmgp0: usi@14f100c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_cmgp 0x2070>; + status = "disabled"; hsi2c_25: i2c@14f10000 { @@ -1394,6 +1459,7 @@ hsi2c_25: i2c@14f10000 { interrupts = ; pinctrl-0 = <&hsi2c25_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1408,6 +1474,7 @@ usi_cmgp1: usi@14f200c0 { <&cmu_cmgp CLK_DOUT_CMGP_USI1>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_cmgp 0x2010>; + status = "disabled"; hsi2c_26: i2c@14f20000 { @@ -1422,6 +1489,7 @@ hsi2c_26: i2c@14f20000 { interrupts = ; pinctrl-0 = <&hsi2c26_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1435,6 +1503,7 @@ serial_15: serial@14f20000 { pinctrl-0 = <&uart15_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1450,6 +1519,7 @@ usi_i2c_cmgp1: usi@14f300c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_cmgp 0x2074>; + status = "disabled"; hsi2c_27: i2c@14f30000 { @@ -1464,6 +1534,7 @@ hsi2c_27: i2c@14f30000 { interrupts = ; pinctrl-0 = <&hsi2c27_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1478,6 +1549,7 @@ usi_cmgp2: usi@14f400c0 { <&cmu_cmgp CLK_DOUT_CMGP_USI2>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_cmgp 0x2020>; + status = "disabled"; hsi2c_28: i2c@14f40000 { @@ -1492,6 +1564,7 @@ hsi2c_28: i2c@14f40000 { interrupts = ; pinctrl-0 = <&hsi2c28_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1505,6 +1578,7 @@ serial_16: serial@14f40000 { pinctrl-0 = <&uart16_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1520,6 +1594,7 @@ usi_i2c_cmgp2: usi@14f500c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_cmgp 0x2024>; + status = "disabled"; hsi2c_29: i2c@14f50000 { @@ -1534,6 +1609,7 @@ hsi2c_29: i2c@14f50000 { interrupts = ; pinctrl-0 = <&hsi2c29_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1548,6 +1624,7 @@ usi_cmgp3: usi@14f600c0 { <&cmu_cmgp CLK_DOUT_CMGP_USI3>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_cmgp 0x2030>; + status = "disabled"; hsi2c_30: i2c@14f60000 { @@ -1562,6 +1639,7 @@ hsi2c_30: i2c@14f60000 { interrupts = ; pinctrl-0 = <&hsi2c30_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1575,6 +1653,7 @@ serial_17: serial@14f60000 { pinctrl-0 = <&uart17_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1590,6 +1669,7 @@ usi_i2c_cmgp3: usi@14f700c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_cmgp 0x2034>; + status = "disabled"; hsi2c_31: i2c@14f70000 { @@ -1604,6 +1684,7 @@ hsi2c_31: i2c@14f70000 { interrupts = ; pinctrl-0 = <&hsi2c31_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1618,6 +1699,7 @@ usi_cmgp4: usi@14f800c0 { <&cmu_cmgp CLK_DOUT_CMGP_USI4>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_cmgp 0x2040>; + status = "disabled"; hsi2c_32: i2c@14f80000 { @@ -1632,6 +1714,7 @@ hsi2c_32: i2c@14f80000 { interrupts = ; pinctrl-0 = <&hsi2c32_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1645,6 +1728,7 @@ serial_18: serial@14f80000 { pinctrl-0 = <&uart18_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1660,6 +1744,7 @@ usi_i2c_cmgp4: usi@14f900c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_cmgp 0x2044>; + status = "disabled"; hsi2c_33: i2c@14f90000 { @@ -1674,6 +1759,7 @@ hsi2c_33: i2c@14f90000 { interrupts = ; pinctrl-0 = <&hsi2c33_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1688,6 +1774,7 @@ usi_cmgp5: usi@14fa00c0 { <&cmu_cmgp CLK_DOUT_CMGP_USI5>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_cmgp 0x2050>; + status = "disabled"; hsi2c_34: i2c@14fa0000 { @@ -1702,6 +1789,7 @@ hsi2c_34: i2c@14fa0000 { interrupts = ; pinctrl-0 = <&hsi2c34_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1715,6 +1803,7 @@ serial_19: serial@14fa0000 { pinctrl-0 = <&uart19_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1730,6 +1819,7 @@ usi_i2c_cmgp5: usi@14fb00c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_cmgp 0x2054>; + status = "disabled"; hsi2c_35: i2c@14fb0000 { @@ -1744,6 +1834,7 @@ hsi2c_35: i2c@14fb0000 { interrupts = ; pinctrl-0 = <&hsi2c35_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1758,6 +1849,7 @@ usi_cmgp6: usi@14fc00c0 { <&cmu_cmgp CLK_DOUT_CMGP_USI6>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&syscon_cmgp 0x2060>; + status = "disabled"; hsi2c_36: i2c@14fc0000 { @@ -1772,6 +1864,7 @@ hsi2c_36: i2c@14fc0000 { interrupts = ; pinctrl-0 = <&hsi2c36_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1785,6 +1878,7 @@ serial_20: serial@14fc0000 { pinctrl-0 = <&uart20_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; }; @@ -1800,6 +1894,7 @@ usi_i2c_cmgp6: usi@14fd00c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_cmgp 0x2064>; + status = "disabled"; hsi2c_37: i2c@14fd0000 { @@ -1814,6 +1909,7 @@ hsi2c_37: i2c@14fd0000 { interrupts = ; pinctrl-0 = <&hsi2c37_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1829,6 +1925,7 @@ usi_i2c_cmgp7: usi@14fe00c0 { clock-names = "pclk", "ipclk"; samsung,mode = ; samsung,sysreg = <&syscon_cmgp 0x2080>; + status = "disabled"; hsi2c_38: i2c@14fe0000 { @@ -1843,6 +1940,7 @@ hsi2c_38: i2c@14fe0000 { interrupts = ; pinctrl-0 = <&hsi2c38_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi index 540b4d6c9067..9bfa0474675c 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi @@ -12,6 +12,7 @@ bus_g2d_400: bus0 { clocks = <&cmu_top CLK_ACLK_G2D_400>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_400_opp_table>; + status = "disabled"; }; @@ -20,6 +21,7 @@ bus_g2d_266: bus1 { clocks = <&cmu_top CLK_ACLK_G2D_266>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_266_opp_table>; + status = "disabled"; }; @@ -28,6 +30,7 @@ bus_gscl: bus2 { clocks = <&cmu_top CLK_ACLK_GSCL_333>; clock-names = "bus"; operating-points-v2 = <&bus_gscl_opp_table>; + status = "disabled"; }; @@ -36,6 +39,7 @@ bus_hevc: bus3 { clocks = <&cmu_top CLK_ACLK_HEVC_400>; clock-names = "bus"; operating-points-v2 = <&bus_hevc_opp_table>; + status = "disabled"; }; @@ -44,6 +48,7 @@ bus_jpeg: bus4 { clocks = <&cmu_top CLK_SCLK_JPEG_MSCL>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_400_opp_table>; + status = "disabled"; }; @@ -52,6 +57,7 @@ bus_mfc: bus5 { clocks = <&cmu_top CLK_ACLK_MFC_400>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_400_opp_table>; + status = "disabled"; }; @@ -60,6 +66,7 @@ bus_mscl: bus6 { clocks = <&cmu_top CLK_ACLK_MSCL_400>; clock-names = "bus"; operating-points-v2 = <&bus_g2d_400_opp_table>; + status = "disabled"; }; @@ -68,6 +75,7 @@ bus_noc0: bus7 { clocks = <&cmu_top CLK_ACLK_BUS0_400>; clock-names = "bus"; operating-points-v2 = <&bus_hevc_opp_table>; + status = "disabled"; }; @@ -76,6 +84,7 @@ bus_noc1: bus8 { clocks = <&cmu_top CLK_ACLK_BUS1_400>; clock-names = "bus"; operating-points-v2 = <&bus_hevc_opp_table>; + status = "disabled"; }; @@ -84,6 +93,7 @@ bus_noc2: bus9 { clocks = <&cmu_mif CLK_ACLK_BUS2_400>; clock-names = "bus"; operating-points-v2 = <&bus_noc2_opp_table>; + status = "disabled"; }; @@ -95,22 +105,27 @@ opp-400000000 { opp-hz = /bits/ 64 <400000000>; opp-microvolt = <1075000>; }; + opp-267000000 { opp-hz = /bits/ 64 <267000000>; opp-microvolt = <1000000>; }; + opp-200000000 { opp-hz = /bits/ 64 <200000000>; opp-microvolt = <975000>; }; + opp-160000000 { opp-hz = /bits/ 64 <160000000>; opp-microvolt = <962500>; }; + opp-134000000 { opp-hz = /bits/ 64 <134000000>; opp-microvolt = <950000>; }; + opp-100000000 { opp-hz = /bits/ 64 <100000000>; opp-microvolt = <937500>; @@ -123,15 +138,19 @@ bus_g2d_266_opp_table: opp-table-3 { opp-267000000 { opp-hz = /bits/ 64 <267000000>; }; + opp-200000000 { opp-hz = /bits/ 64 <200000000>; }; + opp-160000000 { opp-hz = /bits/ 64 <160000000>; }; + opp-134000000 { opp-hz = /bits/ 64 <134000000>; }; + opp-100000000 { opp-hz = /bits/ 64 <100000000>; }; @@ -143,9 +162,11 @@ bus_gscl_opp_table: opp-table-4 { opp-333000000 { opp-hz = /bits/ 64 <333000000>; }; + opp-222000000 { opp-hz = /bits/ 64 <222000000>; }; + opp-166500000 { opp-hz = /bits/ 64 <166500000>; }; @@ -158,18 +179,23 @@ bus_hevc_opp_table: opp-table-5 { opp-400000000 { opp-hz = /bits/ 64 <400000000>; }; + opp-267000000 { opp-hz = /bits/ 64 <267000000>; }; + opp-200000000 { opp-hz = /bits/ 64 <200000000>; }; + opp-160000000 { opp-hz = /bits/ 64 <160000000>; }; + opp-134000000 { opp-hz = /bits/ 64 <134000000>; }; + opp-100000000 { opp-hz = /bits/ 64 <100000000>; }; @@ -181,12 +207,15 @@ bus_noc2_opp_table: opp-table-6 { opp-400000000 { opp-hz = /bits/ 64 <400000000>; }; + opp-200000000 { opp-hz = /bits/ 64 <200000000>; }; + opp-134000000 { opp-hz = /bits/ 64 <134000000>; }; + opp-100000000 { opp-hz = /bits/ 64 <100000000>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi index 681553577ebc..d6850c51db26 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi @@ -139,7 +139,7 @@ gpz1: gpz1-gpio-bank { i2s0_bus: i2s0-bus-pins { samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3", - "gpz0-4", "gpz0-5", "gpz0-6"; + "gpz0-4", "gpz0-5", "gpz0-6"; samsung,pin-function = ; samsung,pin-pud = ; samsung,pin-drv = ; @@ -572,16 +572,14 @@ hs_i2c9_bus: hs-i2c9-bus-pins { }; i2s1_bus: i2s1-bus-pins { - samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2", - "gpd4-3", "gpd4-4"; + samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2", "gpd4-3", "gpd4-4"; samsung,pin-function = ; samsung,pin-pud = ; samsung,pin-drv = ; }; pcm1_bus: pcm1-bus-pins { - samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2", - "gpd4-3", "gpd4-4"; + samsung,pins = "gpd4-0", "gpd4-1", "gpd4-2", "gpd4-3", "gpd4-4"; samsung,pin-function = ; samsung,pin-pud = ; samsung,pin-drv = ; diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index a1fb354dea9f..0ad02a098765 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -141,6 +141,7 @@ sound { &adc { vdd-supply = <&ldo3_reg>; + status = "okay"; thermistor-ap { @@ -173,110 +174,120 @@ &bus_g2d_400 { devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>; vdd-supply = <&buck4_reg>; exynos,saturation-ratio = <10>; + status = "okay"; }; &bus_g2d_266 { devfreq = <&bus_g2d_400>; + status = "okay"; }; &bus_gscl { devfreq = <&bus_g2d_400>; + status = "okay"; }; &bus_hevc { devfreq = <&bus_g2d_400>; + status = "okay"; }; &bus_jpeg { devfreq = <&bus_g2d_400>; + status = "okay"; }; &bus_mfc { devfreq = <&bus_g2d_400>; + status = "okay"; }; &bus_mscl { devfreq = <&bus_g2d_400>; + status = "okay"; }; &bus_noc0 { devfreq = <&bus_g2d_400>; + status = "okay"; }; &bus_noc1 { devfreq = <&bus_g2d_400>; + status = "okay"; }; &bus_noc2 { devfreq = <&bus_g2d_400>; + status = "okay"; }; &cmu_aud { assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>, - <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>, - <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>, - <&cmu_top CLK_MOUT_AUD_PLL>, - <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, - <&cmu_top CLK_MOUT_SCLK_AUDIO0>, - <&cmu_top CLK_MOUT_SCLK_AUDIO1>, - <&cmu_top CLK_MOUT_SCLK_SPDIF>, + <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>, + <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>, + <&cmu_top CLK_MOUT_AUD_PLL>, + <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, + <&cmu_top CLK_MOUT_SCLK_AUDIO0>, + <&cmu_top CLK_MOUT_SCLK_AUDIO1>, + <&cmu_top CLK_MOUT_SCLK_SPDIF>, - <&cmu_aud CLK_DIV_AUD_CA5>, - <&cmu_aud CLK_DIV_ACLK_AUD>, - <&cmu_aud CLK_DIV_PCLK_DBG_AUD>, - <&cmu_aud CLK_DIV_SCLK_AUD_I2S>, - <&cmu_aud CLK_DIV_SCLK_AUD_PCM>, - <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>, - <&cmu_aud CLK_DIV_SCLK_AUD_UART>, - <&cmu_top CLK_DIV_SCLK_AUDIO0>, - <&cmu_top CLK_DIV_SCLK_AUDIO1>, - <&cmu_top CLK_DIV_SCLK_PCM1>, - <&cmu_top CLK_DIV_SCLK_I2S1>; + <&cmu_aud CLK_DIV_AUD_CA5>, + <&cmu_aud CLK_DIV_ACLK_AUD>, + <&cmu_aud CLK_DIV_PCLK_DBG_AUD>, + <&cmu_aud CLK_DIV_SCLK_AUD_I2S>, + <&cmu_aud CLK_DIV_SCLK_AUD_PCM>, + <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>, + <&cmu_aud CLK_DIV_SCLK_AUD_UART>, + <&cmu_top CLK_DIV_SCLK_AUDIO0>, + <&cmu_top CLK_DIV_SCLK_AUDIO1>, + <&cmu_top CLK_DIV_SCLK_PCM1>, + <&cmu_top CLK_DIV_SCLK_I2S1>; assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>, - <&cmu_aud CLK_MOUT_AUD_PLL_USER>, - <&cmu_aud CLK_MOUT_AUD_PLL_USER>, - <&cmu_top CLK_FOUT_AUD_PLL>, - <&cmu_top CLK_MOUT_AUD_PLL>, - <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, - <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, - <&cmu_top CLK_SCLK_AUDIO0>; + <&cmu_aud CLK_MOUT_AUD_PLL_USER>, + <&cmu_aud CLK_MOUT_AUD_PLL_USER>, + <&cmu_top CLK_FOUT_AUD_PLL>, + <&cmu_top CLK_MOUT_AUD_PLL>, + <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, + <&cmu_top CLK_MOUT_AUD_PLL_USER_T>, + <&cmu_top CLK_SCLK_AUDIO0>; assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, - <196608001>, <65536001>, <32768001>, <49152001>, - <2048001>, <24576001>, <196608001>, - <24576001>, <98304001>, <2048001>, <49152001>; + <196608001>, <65536001>, <32768001>, <49152001>, + <2048001>, <24576001>, <196608001>, + <24576001>, <98304001>, <2048001>, <49152001>; }; &cmu_fsys { assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>, - <&cmu_top CLK_MOUT_SCLK_USBHOST30>, - <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, - <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, - <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, - <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, - <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, - <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, - <&cmu_top CLK_DIV_SCLK_USBDRD30>, - <&cmu_top CLK_DIV_SCLK_USBHOST30>; + <&cmu_top CLK_MOUT_SCLK_USBHOST30>, + <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>, + <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>, + <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>, + <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>, + <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>, + <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>, + <&cmu_top CLK_DIV_SCLK_USBDRD30>, + <&cmu_top CLK_DIV_SCLK_USBHOST30>; assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>, - <&cmu_top CLK_MOUT_BUS_PLL_USER>, - <&cmu_top CLK_SCLK_USBDRD30_FSYS>, - <&cmu_top CLK_SCLK_USBHOST30_FSYS>, - <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, - <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, - <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, - <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; + <&cmu_top CLK_MOUT_BUS_PLL_USER>, + <&cmu_top CLK_SCLK_USBDRD30_FSYS>, + <&cmu_top CLK_SCLK_USBHOST30_FSYS>, + <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>, + <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>, + <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>, + <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>; assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>, <66700000>, <66700000>; }; @@ -336,6 +347,7 @@ ports { port@0 { reg = <0>; + tv_to_hdmi: endpoint { remote-endpoint = <&hdmi_to_tv>; }; @@ -344,7 +356,6 @@ tv_to_hdmi: endpoint { }; &dsi { - status = "okay"; vddcore-supply = <&ldo6_reg>; vddio-supply = <&ldo7_reg>; samsung,burst-clock-frequency = <512000000>; @@ -352,26 +363,31 @@ &dsi { samsung,pll-clock-frequency = <24000000>; pinctrl-names = "default"; pinctrl-0 = <&te_irq>; + + status = "okay"; }; &gpu { mali-supply = <&buck6_reg>; + status = "okay"; }; &hdmi { hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>; - status = "okay"; vdd-supply = <&ldo6_reg>; vdd_osc-supply = <&ldo7_reg>; vdd_pll-supply = <&ldo6_reg>; + status = "okay"; + ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; + hdmi_to_tv: endpoint { remote-endpoint = <&tv_to_hdmi>; }; @@ -379,6 +395,7 @@ hdmi_to_tv: endpoint { port@1 { reg = <1>; + hdmi_to_mhl: endpoint { remote-endpoint = <&mhl_to_hdmi>; }; @@ -387,9 +404,10 @@ hdmi_to_mhl: endpoint { }; &hsi2c_0 { - status = "okay"; clock-frequency = <2500000>; + status = "okay"; + pmic@66 { compatible = "samsung,s2mps13-pmic"; interrupt-parent = <&gpa0>; @@ -401,8 +419,7 @@ pmic@66 { s2mps13_osc: clocks { compatible = "samsung,s2mps13-clk"; #clock-cells = <1>; - clock-output-names = "s2mps13_ap", "s2mps13_cp", - "s2mps13_bt"; + clock-output-names = "s2mps13_ap", "s2mps13_cp", "s2mps13_bt"; }; regulators { @@ -418,6 +435,7 @@ ldo2_reg: LDO2 { regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -435,6 +453,7 @@ ldo4_reg: LDO4 { regulator-min-microvolt = <1300000>; regulator-max-microvolt = <1300000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -445,6 +464,7 @@ ldo5_reg: LDO5 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -454,6 +474,7 @@ ldo6_reg: LDO6 { regulator-name = "VDD10_MIPI2L_1.0V_AP"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; + regulator-state-mem { regulator-off-in-suspend; }; @@ -464,6 +485,7 @@ ldo7_reg: LDO7 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -474,6 +496,7 @@ ldo8_reg: LDO8 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -484,6 +507,7 @@ ldo9_reg: LDO9 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -493,6 +517,7 @@ ldo10_reg: LDO10 { regulator-name = "VDD33_USB30_3.0V_AP"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; + regulator-state-mem { regulator-off-in-suspend; }; @@ -503,6 +528,7 @@ ldo11_reg: LDO11 { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -520,6 +546,7 @@ ldo13_reg: LDO13 { regulator-min-microvolt = <950000>; regulator-max-microvolt = <950000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -530,6 +557,7 @@ ldo14_reg: LDO14 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -540,6 +568,7 @@ ldo15_reg: LDO15 { regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -706,6 +735,7 @@ buck1_reg: BUCK1 { regulator-min-microvolt = <600000>; regulator-max-microvolt = <1500000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -716,6 +746,7 @@ buck2_reg: BUCK2 { regulator-min-microvolt = <900000>; regulator-max-microvolt = <1300000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -726,6 +757,7 @@ buck3_reg: BUCK3 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1200000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -736,6 +768,7 @@ buck4_reg: BUCK4 { regulator-min-microvolt = <600000>; regulator-max-microvolt = <1500000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -746,6 +779,7 @@ buck5_reg: BUCK5 { regulator-min-microvolt = <600000>; regulator-max-microvolt = <1500000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -756,6 +790,7 @@ buck6_reg: BUCK6 { regulator-min-microvolt = <600000>; regulator-max-microvolt = <1500000>; regulator-always-on; + regulator-state-mem { regulator-off-in-suspend; }; @@ -819,9 +854,10 @@ stmfts: touchscreen@49 { }; &hsi2c_7 { - status = "okay"; clock-frequency = <1000000>; + status = "okay"; + bridge@39 { reg = <0x39>; compatible = "sil,sii8620"; @@ -839,6 +875,7 @@ ports { port@0 { reg = <0>; + mhl_to_hdmi: endpoint { remote-endpoint = <&hdmi_to_mhl>; }; @@ -846,6 +883,7 @@ mhl_to_hdmi: endpoint { port@1 { reg = <1>; + mhl_to_musb_con: endpoint { remote-endpoint = <&musb_con_to_mhl>; }; @@ -884,11 +922,13 @@ port@0 { * Add a disabled port just to satisfy dtschema. */ reg = <0>; + status = "disabled"; }; port@3 { reg = <3>; + musb_con_to_mhl: endpoint { remote-endpoint = <&mhl_to_musb_con>; }; @@ -907,6 +947,7 @@ muic_to_usb: endpoint { regulators { compatible = "maxim,max77843-regulator"; + safeout1_reg: SAFEOUT1 { regulator-name = "SAFEOUT1"; regulator-min-microvolt = <3300000>; @@ -945,11 +986,11 @@ &i2s0 { &i2s1 { assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>; assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>; + status = "okay"; }; &mshc_0 { - status = "okay"; mmc-ddr-1_8v; mmc-hs200-1_8v; mmc-hs400-1_8v; @@ -964,14 +1005,15 @@ &mshc_0 { fifo-depth = <0x80>; pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 - &sd0_bus8 &sd0_rdqs>; + &sd0_bus8 &sd0_rdqs>; bus-width = <8>; assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>; assigned-clock-rates = <800000000>; + + status = "okay"; }; &mshc_2 { - status = "okay"; cap-sd-highspeed; disable-wp; cd-gpios = <&gpa2 4 GPIO_ACTIVE_LOW>; @@ -983,10 +1025,11 @@ &mshc_2 { pinctrl-names = "default"; pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>; bus-width = <4>; + + status = "okay"; }; &pcie { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pcie_bus &pcie_wlanen>; vdd10-supply = <&ldo6_reg>; @@ -998,6 +1041,8 @@ &pcie { assigned-clock-rates = <0>, <100000000>; interrupt-map-mask = <0 0 0 0>; interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; + + status = "okay"; }; &pcie_phy { @@ -1006,6 +1051,7 @@ &pcie_phy { &ppmu_d0_general { status = "okay"; + events { ppmu_event0_d0_general: ppmu-event0-d0-general { event-name = "ppmu-event0-d0-general"; @@ -1015,6 +1061,7 @@ ppmu_event0_d0_general: ppmu-event0-d0-general { &ppmu_d1_general { status = "okay"; + events { ppmu_event0_d1_general: ppmu-event0-d1-general { event-name = "ppmu-event0-d1-general"; @@ -1238,6 +1285,7 @@ initial_touch: initial-state { &pwm { pinctrl-0 = <&pwm0_out>; pinctrl-names = "default"; + status = "okay"; }; @@ -1270,6 +1318,7 @@ bluetooth { &spi_1 { cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>; + status = "okay"; wm5110: audio-codec@0 { @@ -1279,7 +1328,7 @@ wm5110: audio-codec@0 { interrupt-parent = <&gpa0>; interrupts = <4 IRQ_TYPE_NONE>; clocks = <&pmu_system_controller 0>, - <&s2mps13_osc S2MPS11_CLK_BT>; + <&s2mps13_osc S2MPS11_CLK_BT>; clock-names = "mclk1", "mclk2"; gpio-controller; @@ -1316,9 +1365,10 @@ controller-data { }; &spi_3 { - status = "okay"; no-cs-readback; + status = "okay"; + irled@0 { compatible = "ir-spi-led"; reg = <0x0>; @@ -1339,22 +1389,26 @@ &timer { &tmu_atlas0 { vtmu-supply = <&ldo3_reg>; + status = "okay"; }; &tmu_apollo { vtmu-supply = <&ldo3_reg>; + status = "okay"; }; &tmu_g3d { vtmu-supply = <&ldo3_reg>; + status = "okay"; }; &usbdrd30 { vdd33-supply = <&ldo10_reg>; vdd10-supply = <&ldo6_reg>; + status = "okay"; }; @@ -1364,6 +1418,7 @@ &usbdrd_dwc3 { &usbdrd30_phy { vbus-supply = <&safeout1_reg>; + status = "okay"; port { diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi index 81b72393dd0d..a3ebc49fcd36 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tmu.dtsi @@ -7,43 +7,49 @@ #include -/ { -thermal-zones { +&thermal_zones { atlas0_thermal: atlas0-thermal { thermal-sensors = <&tmu_atlas0>; polling-delay-passive = <0>; polling-delay = <0>; + trips { atlas0_alert_0: atlas0-alert-0 { temperature = <65000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas0_alert_1: atlas0-alert-1 { temperature = <70000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas0_alert_2: atlas0-alert-2 { temperature = <75000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas0_alert_3: atlas0-alert-3 { temperature = <80000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas0_alert_4: atlas0-alert-4 { temperature = <85000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas0_alert_5: atlas0-alert-5 { temperature = <90000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas0_alert_6: atlas0-alert-6 { temperature = <95000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ @@ -58,36 +64,42 @@ map0 { cooling-device = <&cpu4 1 2>, <&cpu5 1 2>, <&cpu6 1 2>, <&cpu7 1 2>; }; + map1 { /* Set maximum frequency as 1700MHz */ trip = <&atlas0_alert_1>; cooling-device = <&cpu4 2 3>, <&cpu5 2 3>, <&cpu6 2 3>, <&cpu7 2 3>; }; + map2 { /* Set maximum frequency as 1600MHz */ trip = <&atlas0_alert_2>; cooling-device = <&cpu4 3 4>, <&cpu5 3 4>, <&cpu6 3 4>, <&cpu7 3 4>; }; + map3 { /* Set maximum frequency as 1500MHz */ trip = <&atlas0_alert_3>; cooling-device = <&cpu4 4 5>, <&cpu5 4 5>, <&cpu6 4 5>, <&cpu7 4 5>; }; + map4 { /* Set maximum frequency as 1400MHz */ trip = <&atlas0_alert_4>; cooling-device = <&cpu4 5 7>, <&cpu5 5 7>, <&cpu6 5 7>, <&cpu7 5 7>; }; + map5 { /* Set maximum frequencyas 1200MHz */ trip = <&atlas0_alert_5>; cooling-device = <&cpu4 7 9>, <&cpu5 7 9>, <&cpu6 7 9>, <&cpu7 7 9>; }; + map6 { /* Set maximum frequency as 1000MHz */ trip = <&atlas0_alert_6>; @@ -101,37 +113,44 @@ atlas1_thermal: atlas1-thermal { thermal-sensors = <&tmu_atlas1>; polling-delay-passive = <0>; polling-delay = <0>; + trips { atlas1_alert_0: atlas1-alert-0 { temperature = <65000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas1_alert_1: atlas1-alert-1 { temperature = <70000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas1_alert_2: atlas1-alert-2 { temperature = <75000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas1_alert_3: atlas1-alert-3 { temperature = <80000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas1_alert_4: atlas1-alert-4 { temperature = <85000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas1_alert_5: atlas1-alert-5 { temperature = <90000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + atlas1_alert_6: atlas1-alert-6 { temperature = <95000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ @@ -144,37 +163,44 @@ g3d_thermal: g3d-thermal { thermal-sensors = <&tmu_g3d>; polling-delay-passive = <0>; polling-delay = <0>; + trips { g3d_alert_0: g3d-alert-0 { temperature = <70000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + g3d_alert_1: g3d-alert-1 { temperature = <75000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + g3d_alert_2: g3d-alert-2 { temperature = <80000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + g3d_alert_3: g3d-alert-3 { temperature = <85000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + g3d_alert_4: g3d-alert-4 { temperature = <90000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + g3d_alert_5: g3d-alert-5 { temperature = <95000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + g3d_alert_6: g3d-alert-6 { temperature = <100000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ @@ -187,37 +213,44 @@ apollo_thermal: apollo-thermal { thermal-sensors = <&tmu_apollo>; polling-delay-passive = <0>; polling-delay = <0>; + trips { apollo_alert_0: apollo-alert-0 { temperature = <65000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + apollo_alert_1: apollo-alert-1 { temperature = <70000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + apollo_alert_2: apollo-alert-2 { temperature = <75000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + apollo_alert_3: apollo-alert-3 { temperature = <80000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + apollo_alert_4: apollo-alert-4 { temperature = <85000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + apollo_alert_5: apollo-alert-5 { temperature = <90000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + apollo_alert_6: apollo-alert-6 { temperature = <95000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ @@ -232,24 +265,28 @@ map0 { cooling-device = <&cpu0 1 2>, <&cpu1 1 2>, <&cpu2 1 2>, <&cpu3 1 2>; }; + map1 { /* Set maximum frequency as 1100MHz */ trip = <&apollo_alert_3>; cooling-device = <&cpu0 2 3>, <&cpu1 2 3>, <&cpu2 2 3>, <&cpu3 2 3>; }; + map2 { /* Set maximum frequency as 1000MHz */ trip = <&apollo_alert_4>; cooling-device = <&cpu0 3 4>, <&cpu1 3 4>, <&cpu2 3 4>, <&cpu3 3 4>; }; + map3 { /* Set maximum frequency as 900MHz */ trip = <&apollo_alert_5>; cooling-device = <&cpu0 4 5>, <&cpu1 4 5>, <&cpu2 4 5>, <&cpu3 4 5>; }; + map4 { /* Set maximum frequency as 800MHz */ trip = <&apollo_alert_6>; @@ -263,37 +300,44 @@ isp_thermal: isp-thermal { thermal-sensors = <&tmu_isp>; polling-delay-passive = <0>; polling-delay = <0>; + trips { isp_alert_0: isp-alert-0 { temperature = <80000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + isp_alert_1: isp-alert-1 { temperature = <85000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + isp_alert_2: isp-alert-2 { temperature = <90000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + isp_alert_3: isp-alert-3 { temperature = <95000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + isp_alert_4: isp-alert-4 { temperature = <100000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + isp_alert_5: isp-alert-5 { temperature = <105000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ type = "active"; }; + isp_alert_6: isp-alert-6 { temperature = <110000>; /* millicelsius */ hysteresis = <1000>; /* millicelsius */ @@ -302,4 +346,3 @@ isp_alert_6: isp-alert-6 { }; }; }; -}; diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index fa2029e280a5..d318c87effaa 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -57,12 +57,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -72,12 +75,15 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; + core3 { cpu = <&cpu7>; }; @@ -243,38 +249,47 @@ opp-400000000 { opp-hz = /bits/ 64 <400000000>; opp-microvolt = <900000>; }; + opp-500000000 { opp-hz = /bits/ 64 <500000000>; opp-microvolt = <925000>; }; + opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <950000>; }; + opp-700000000 { opp-hz = /bits/ 64 <700000000>; opp-microvolt = <975000>; }; + opp-800000000 { opp-hz = /bits/ 64 <800000000>; opp-microvolt = <1000000>; }; + opp-900000000 { opp-hz = /bits/ 64 <900000000>; opp-microvolt = <1050000>; }; + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <1075000>; }; + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <1112500>; }; + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1112500>; }; + opp-1300000000 { opp-hz = /bits/ 64 <1300000000>; opp-microvolt = <1150000>; @@ -289,58 +304,72 @@ opp-500000000 { opp-hz = /bits/ 64 <500000000>; opp-microvolt = <900000>; }; + opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <900000>; }; + opp-700000000 { opp-hz = /bits/ 64 <700000000>; opp-microvolt = <912500>; }; + opp-800000000 { opp-hz = /bits/ 64 <800000000>; opp-microvolt = <912500>; }; + opp-900000000 { opp-hz = /bits/ 64 <900000000>; opp-microvolt = <937500>; }; + opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <975000>; }; + opp-1100000000 { opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <1012500>; }; + opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1037500>; }; + opp-1300000000 { opp-hz = /bits/ 64 <1300000000>; opp-microvolt = <1062500>; }; + opp-1400000000 { opp-hz = /bits/ 64 <1400000000>; opp-microvolt = <1087500>; }; + opp-1500000000 { opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <1125000>; }; + opp-1600000000 { opp-hz = /bits/ 64 <1600000000>; opp-microvolt = <1137500>; }; + opp-1700000000 { opp-hz = /bits/ 64 <1700000000>; opp-microvolt = <1175000>; }; + opp-1800000000 { opp-hz = /bits/ 64 <1800000000>; opp-microvolt = <1212500>; }; + opp-1900000000 { opp-hz = /bits/ 64 <1900000000>; opp-microvolt = <1262500>; @@ -371,14 +400,14 @@ cmu_top: clock-controller@10030000 { reg = <0x10030000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "sclk_mphy_pll", - "sclk_mfc_pll", - "sclk_bus_pll"; clocks = <&xxti>, - <&cmu_cpif CLK_SCLK_MPHY_PLL>, - <&cmu_mif CLK_SCLK_MFC_PLL>, - <&cmu_mif CLK_SCLK_BUS_PLL>; + <&cmu_cpif CLK_SCLK_MPHY_PLL>, + <&cmu_mif CLK_SCLK_MFC_PLL>, + <&cmu_mif CLK_SCLK_BUS_PLL>; + clock-names = "oscclk", + "sclk_mphy_pll", + "sclk_mfc_pll", + "sclk_bus_pll"; }; cmu_cpif: clock-controller@10fc0000 { @@ -386,8 +415,8 @@ cmu_cpif: clock-controller@10fc0000 { reg = <0x10fc0000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk"; clocks = <&xxti>; + clock-names = "oscclk"; }; cmu_mif: clock-controller@105b0000 { @@ -395,10 +424,10 @@ cmu_mif: clock-controller@105b0000 { reg = <0x105b0000 0x2000>; #clock-cells = <1>; - clock-names = "oscclk", - "sclk_mphy_pll"; clocks = <&xxti>, - <&cmu_cpif CLK_SCLK_MPHY_PLL>; + <&cmu_cpif CLK_SCLK_MPHY_PLL>; + clock-names = "oscclk", + "sclk_mphy_pll"; }; cmu_peric: clock-controller@14c80000 { @@ -418,26 +447,26 @@ cmu_fsys: clock-controller@156e0000 { reg = <0x156e0000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "sclk_ufs_mphy", - "aclk_fsys_200", - "sclk_pcie_100_fsys", - "sclk_ufsunipro_fsys", - "sclk_mmc2_fsys", - "sclk_mmc1_fsys", - "sclk_mmc0_fsys", - "sclk_usbhost30_fsys", - "sclk_usbdrd30_fsys"; clocks = <&xxti>, - <&cmu_cpif CLK_SCLK_UFS_MPHY>, - <&cmu_top CLK_ACLK_FSYS_200>, - <&cmu_top CLK_SCLK_PCIE_100_FSYS>, - <&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>, - <&cmu_top CLK_SCLK_MMC2_FSYS>, - <&cmu_top CLK_SCLK_MMC1_FSYS>, - <&cmu_top CLK_SCLK_MMC0_FSYS>, - <&cmu_top CLK_SCLK_USBHOST30_FSYS>, - <&cmu_top CLK_SCLK_USBDRD30_FSYS>; + <&cmu_cpif CLK_SCLK_UFS_MPHY>, + <&cmu_top CLK_ACLK_FSYS_200>, + <&cmu_top CLK_SCLK_PCIE_100_FSYS>, + <&cmu_top CLK_SCLK_UFSUNIPRO_FSYS>, + <&cmu_top CLK_SCLK_MMC2_FSYS>, + <&cmu_top CLK_SCLK_MMC1_FSYS>, + <&cmu_top CLK_SCLK_MMC0_FSYS>, + <&cmu_top CLK_SCLK_USBHOST30_FSYS>, + <&cmu_top CLK_SCLK_USBDRD30_FSYS>; + clock-names = "oscclk", + "sclk_ufs_mphy", + "aclk_fsys_200", + "sclk_pcie_100_fsys", + "sclk_ufsunipro_fsys", + "sclk_mmc2_fsys", + "sclk_mmc1_fsys", + "sclk_mmc0_fsys", + "sclk_usbhost30_fsys", + "sclk_usbdrd30_fsys"; }; cmu_g2d: clock-controller@12460000 { @@ -445,12 +474,12 @@ cmu_g2d: clock-controller@12460000 { reg = <0x12460000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "aclk_g2d_266", - "aclk_g2d_400"; clocks = <&xxti>, - <&cmu_top CLK_ACLK_G2D_266>, - <&cmu_top CLK_ACLK_G2D_400>; + <&cmu_top CLK_ACLK_G2D_266>, + <&cmu_top CLK_ACLK_G2D_400>; + clock-names = "oscclk", + "aclk_g2d_266", + "aclk_g2d_400"; power-domains = <&pd_g2d>; }; @@ -459,24 +488,24 @@ cmu_disp: clock-controller@13b90000 { reg = <0x13b90000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "sclk_dsim1_disp", - "sclk_dsim0_disp", - "sclk_dsd_disp", - "sclk_decon_tv_eclk_disp", - "sclk_decon_vclk_disp", - "sclk_decon_eclk_disp", - "sclk_decon_tv_vclk_disp", - "aclk_disp_333"; clocks = <&xxti>, - <&cmu_mif CLK_SCLK_DSIM1_DISP>, - <&cmu_mif CLK_SCLK_DSIM0_DISP>, - <&cmu_mif CLK_SCLK_DSD_DISP>, - <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, - <&cmu_mif CLK_SCLK_DECON_VCLK_DISP>, - <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>, - <&cmu_mif CLK_SCLK_DECON_TV_VCLK_DISP>, - <&cmu_mif CLK_ACLK_DISP_333>; + <&cmu_mif CLK_SCLK_DSIM1_DISP>, + <&cmu_mif CLK_SCLK_DSIM0_DISP>, + <&cmu_mif CLK_SCLK_DSD_DISP>, + <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>, + <&cmu_mif CLK_SCLK_DECON_VCLK_DISP>, + <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>, + <&cmu_mif CLK_SCLK_DECON_TV_VCLK_DISP>, + <&cmu_mif CLK_ACLK_DISP_333>; + clock-names = "oscclk", + "sclk_dsim1_disp", + "sclk_dsim0_disp", + "sclk_dsd_disp", + "sclk_decon_tv_eclk_disp", + "sclk_decon_vclk_disp", + "sclk_decon_eclk_disp", + "sclk_decon_tv_vclk_disp", + "aclk_disp_333"; power-domains = <&pd_disp>; }; @@ -484,8 +513,8 @@ cmu_aud: clock-controller@114c0000 { compatible = "samsung,exynos5433-cmu-aud"; reg = <0x114c0000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", "fout_aud_pll"; clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>; + clock-names = "oscclk", "fout_aud_pll"; power-domains = <&pd_aud>; }; @@ -494,8 +523,8 @@ cmu_bus0: clock-controller@13600000 { reg = <0x13600000 0x1000>; #clock-cells = <1>; - clock-names = "aclk_bus0_400"; clocks = <&cmu_top CLK_ACLK_BUS0_400>; + clock-names = "aclk_bus0_400"; }; cmu_bus1: clock-controller@14800000 { @@ -503,8 +532,8 @@ cmu_bus1: clock-controller@14800000 { reg = <0x14800000 0x1000>; #clock-cells = <1>; - clock-names = "aclk_bus1_400"; clocks = <&cmu_top CLK_ACLK_BUS1_400>; + clock-names = "aclk_bus1_400"; }; cmu_bus2: clock-controller@13400000 { @@ -512,8 +541,8 @@ cmu_bus2: clock-controller@13400000 { reg = <0x13400000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", "aclk_bus2_400"; clocks = <&xxti>, <&cmu_mif CLK_ACLK_BUS2_400>; + clock-names = "oscclk", "aclk_bus2_400"; }; cmu_g3d: clock-controller@14aa0000 { @@ -521,8 +550,8 @@ cmu_g3d: clock-controller@14aa0000 { reg = <0x14aa0000 0x2000>; #clock-cells = <1>; - clock-names = "oscclk", "aclk_g3d_400"; clocks = <&xxti>, <&cmu_top CLK_ACLK_G3D_400>; + clock-names = "oscclk", "aclk_g3d_400"; power-domains = <&pd_g3d>; }; @@ -531,12 +560,12 @@ cmu_gscl: clock-controller@13cf0000 { reg = <0x13cf0000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "aclk_gscl_111", - "aclk_gscl_333"; clocks = <&xxti>, - <&cmu_top CLK_ACLK_GSCL_111>, - <&cmu_top CLK_ACLK_GSCL_333>; + <&cmu_top CLK_ACLK_GSCL_111>, + <&cmu_top CLK_ACLK_GSCL_333>; + clock-names = "oscclk", + "aclk_gscl_111", + "aclk_gscl_333"; power-domains = <&pd_gscl>; }; @@ -545,8 +574,8 @@ cmu_apollo: clock-controller@11900000 { reg = <0x11900000 0x2000>; #clock-cells = <1>; - clock-names = "oscclk", "sclk_bus_pll_apollo"; clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_APOLLO>; + clock-names = "oscclk", "sclk_bus_pll_apollo"; }; cmu_atlas: clock-controller@11800000 { @@ -554,8 +583,8 @@ cmu_atlas: clock-controller@11800000 { reg = <0x11800000 0x2000>; #clock-cells = <1>; - clock-names = "oscclk", "sclk_bus_pll_atlas"; clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>; + clock-names = "oscclk", "sclk_bus_pll_atlas"; }; cmu_mscl: clock-controller@150d0000 { @@ -563,12 +592,12 @@ cmu_mscl: clock-controller@150d0000 { reg = <0x150d0000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "sclk_jpeg_mscl", - "aclk_mscl_400"; clocks = <&xxti>, - <&cmu_top CLK_SCLK_JPEG_MSCL>, - <&cmu_top CLK_ACLK_MSCL_400>; + <&cmu_top CLK_SCLK_JPEG_MSCL>, + <&cmu_top CLK_ACLK_MSCL_400>; + clock-names = "oscclk", + "sclk_jpeg_mscl", + "aclk_mscl_400"; power-domains = <&pd_mscl>; }; @@ -577,8 +606,8 @@ cmu_mfc: clock-controller@15280000 { reg = <0x15280000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", "aclk_mfc_400"; clocks = <&xxti>, <&cmu_top CLK_ACLK_MFC_400>; + clock-names = "oscclk", "aclk_mfc_400"; power-domains = <&pd_mfc>; }; @@ -587,8 +616,8 @@ cmu_hevc: clock-controller@14f80000 { reg = <0x14f80000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", "aclk_hevc_400"; clocks = <&xxti>, <&cmu_top CLK_ACLK_HEVC_400>; + clock-names = "oscclk", "aclk_hevc_400"; power-domains = <&pd_hevc>; }; @@ -597,12 +626,12 @@ cmu_isp: clock-controller@146d0000 { reg = <0x146d0000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "aclk_isp_dis_400", - "aclk_isp_400"; clocks = <&xxti>, - <&cmu_top CLK_ACLK_ISP_DIS_400>, - <&cmu_top CLK_ACLK_ISP_400>; + <&cmu_top CLK_ACLK_ISP_DIS_400>, + <&cmu_top CLK_ACLK_ISP_400>; + clock-names = "oscclk", + "aclk_isp_dis_400", + "aclk_isp_400"; power-domains = <&pd_isp>; }; @@ -611,14 +640,14 @@ cmu_cam0: clock-controller@120d0000 { reg = <0x120d0000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "aclk_cam0_333", - "aclk_cam0_400", - "aclk_cam0_552"; clocks = <&xxti>, - <&cmu_top CLK_ACLK_CAM0_333>, - <&cmu_top CLK_ACLK_CAM0_400>, - <&cmu_top CLK_ACLK_CAM0_552>; + <&cmu_top CLK_ACLK_CAM0_333>, + <&cmu_top CLK_ACLK_CAM0_400>, + <&cmu_top CLK_ACLK_CAM0_552>; + clock-names = "oscclk", + "aclk_cam0_333", + "aclk_cam0_400", + "aclk_cam0_552"; power-domains = <&pd_cam0>; }; @@ -627,20 +656,20 @@ cmu_cam1: clock-controller@145d0000 { reg = <0x145d0000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "sclk_isp_uart_cam1", - "sclk_isp_spi1_cam1", - "sclk_isp_spi0_cam1", - "aclk_cam1_333", - "aclk_cam1_400", - "aclk_cam1_552"; clocks = <&xxti>, - <&cmu_top CLK_SCLK_ISP_UART_CAM1>, - <&cmu_top CLK_SCLK_ISP_SPI1_CAM1>, - <&cmu_top CLK_SCLK_ISP_SPI0_CAM1>, - <&cmu_top CLK_ACLK_CAM1_333>, - <&cmu_top CLK_ACLK_CAM1_400>, - <&cmu_top CLK_ACLK_CAM1_552>; + <&cmu_top CLK_SCLK_ISP_UART_CAM1>, + <&cmu_top CLK_SCLK_ISP_SPI1_CAM1>, + <&cmu_top CLK_SCLK_ISP_SPI0_CAM1>, + <&cmu_top CLK_ACLK_CAM1_333>, + <&cmu_top CLK_ACLK_CAM1_400>, + <&cmu_top CLK_ACLK_CAM1_552>; + clock-names = "oscclk", + "sclk_isp_uart_cam1", + "sclk_isp_spi1_cam1", + "sclk_isp_spi0_cam1", + "aclk_cam1_333", + "aclk_cam1_400", + "aclk_cam1_552"; power-domains = <&pd_cam1>; }; @@ -649,23 +678,23 @@ cmu_imem: clock-controller@11060000 { reg = <0x11060000 0x1000>; #clock-cells = <1>; - clock-names = "oscclk", - "aclk_imem_sssx_266", - "aclk_imem_266", - "aclk_imem_200"; clocks = <&xxti>, - <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, - <&cmu_top CLK_DIV_ACLK_IMEM_266>, - <&cmu_top CLK_DIV_ACLK_IMEM_200>; + <&cmu_top CLK_DIV_ACLK_IMEM_SSSX_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_266>, + <&cmu_top CLK_DIV_ACLK_IMEM_200>; + clock-names = "oscclk", + "aclk_imem_sssx_266", + "aclk_imem_266", + "aclk_imem_200"; }; slim_sss: slim-sss@11140000 { compatible = "samsung,exynos5433-slim-sss"; reg = <0x11140000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk"; clocks = <&cmu_imem CLK_PCLK_SLIMSSS>, <&cmu_imem CLK_ACLK_SLIMSSS>; + clock-names = "pclk", "aclk"; }; pd_gscl: power-domain@105c4000 { @@ -752,9 +781,10 @@ tmu_atlas0: tmu@10060000 { reg = <0x10060000 0x200>; interrupts = ; clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>, - <&cmu_peris CLK_SCLK_TMU0>; + <&cmu_peris CLK_SCLK_TMU0>; clock-names = "tmu_apbif", "tmu_sclk"; #thermal-sensor-cells = <0>; + status = "disabled"; }; @@ -763,9 +793,10 @@ tmu_atlas1: tmu@10068000 { reg = <0x10068000 0x200>; interrupts = ; clocks = <&cmu_peris CLK_PCLK_TMU0_APBIF>, - <&cmu_peris CLK_SCLK_TMU0>; + <&cmu_peris CLK_SCLK_TMU0>; clock-names = "tmu_apbif", "tmu_sclk"; #thermal-sensor-cells = <0>; + status = "disabled"; }; @@ -774,9 +805,10 @@ tmu_g3d: tmu@10070000 { reg = <0x10070000 0x200>; interrupts = ; clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>, - <&cmu_peris CLK_SCLK_TMU1>; + <&cmu_peris CLK_SCLK_TMU1>; clock-names = "tmu_apbif", "tmu_sclk"; #thermal-sensor-cells = <0>; + status = "disabled"; }; @@ -785,9 +817,10 @@ tmu_apollo: tmu@10078000 { reg = <0x10078000 0x200>; interrupts = ; clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>, - <&cmu_peris CLK_SCLK_TMU1>; + <&cmu_peris CLK_SCLK_TMU1>; clock-names = "tmu_apbif", "tmu_sclk"; #thermal-sensor-cells = <0>; + status = "disabled"; }; @@ -796,9 +829,10 @@ tmu_isp: tmu@1007c000 { reg = <0x1007c000 0x200>; interrupts = ; clocks = <&cmu_peris CLK_PCLK_TMU1_APBIF>, - <&cmu_peris CLK_SCLK_TMU1>; + <&cmu_peris CLK_SCLK_TMU1>; clock-names = "tmu_apbif", "tmu_sclk"; #thermal-sensor-cells = <0>; + status = "disabled"; }; @@ -807,17 +841,17 @@ timer@101c0000 { "samsung,exynos4210-mct"; reg = <0x101c0000 0x800>; interrupts = , - , - , - , - , - , - , - , - , - , - , - ; + , + , + , + , + , + , + , + , + , + , + ; clocks = <&xxti>, <&cmu_peris CLK_PCLK_MCT>; clock-names = "fin_pll", "mct"; }; @@ -825,24 +859,28 @@ timer@101c0000 { ppmu_d0_cpu: ppmu@10480000 { compatible = "samsung,exynos-ppmu-v2"; reg = <0x10480000 0x2000>; + status = "disabled"; }; ppmu_d0_general: ppmu@10490000 { compatible = "samsung,exynos-ppmu-v2"; reg = <0x10490000 0x2000>; + status = "disabled"; }; ppmu_d1_cpu: ppmu@104b0000 { compatible = "samsung,exynos-ppmu-v2"; reg = <0x104b0000 0x2000>; + status = "disabled"; }; ppmu_d1_general: ppmu@104c0000 { compatible = "samsung,exynos-ppmu-v2"; reg = <0x104c0000 0x2000>; + status = "disabled"; }; @@ -916,8 +954,8 @@ pmu_system_controller: system-controller@105c0000 { compatible = "samsung,exynos5433-pmu", "simple-mfd", "syscon"; reg = <0x105c0000 0x5008>; #clock-cells = <1>; - clock-names = "clkout16"; clocks = <&xxti>; + clock-names = "clkout16"; mipi_phy: mipi-phy { compatible = "samsung,exynos5433-mipi-video-phy"; @@ -937,13 +975,13 @@ reboot: syscon-reboot { gic: interrupt-controller@11001000 { compatible = "arm,gic-400"; + reg = <0x11001000 0x1000>, + <0x11002000 0x2000>, + <0x11004000 0x2000>, + <0x11006000 0x2000>; #address-cells = <0>; #interrupt-cells = <3>; interrupt-controller; - reg = <0x11001000 0x1000>, - <0x11002000 0x2000>, - <0x11004000 0x2000>, - <0x11006000 0x2000>; interrupts = ; }; @@ -951,37 +989,39 @@ decon: decon@13800000 { compatible = "samsung,exynos5433-decon"; reg = <0x13800000 0x2104>; clocks = <&cmu_disp CLK_PCLK_DECON>, - <&cmu_disp CLK_ACLK_DECON>, - <&cmu_disp CLK_ACLK_SMMU_DECON0X>, - <&cmu_disp CLK_ACLK_XIU_DECON0X>, - <&cmu_disp CLK_PCLK_SMMU_DECON0X>, - <&cmu_disp CLK_ACLK_SMMU_DECON1X>, - <&cmu_disp CLK_ACLK_XIU_DECON1X>, - <&cmu_disp CLK_PCLK_SMMU_DECON1X>, - <&cmu_disp CLK_SCLK_DECON_VCLK>, - <&cmu_disp CLK_SCLK_DECON_ECLK>, - <&cmu_disp CLK_SCLK_DSD>; + <&cmu_disp CLK_ACLK_DECON>, + <&cmu_disp CLK_ACLK_SMMU_DECON0X>, + <&cmu_disp CLK_ACLK_XIU_DECON0X>, + <&cmu_disp CLK_PCLK_SMMU_DECON0X>, + <&cmu_disp CLK_ACLK_SMMU_DECON1X>, + <&cmu_disp CLK_ACLK_XIU_DECON1X>, + <&cmu_disp CLK_PCLK_SMMU_DECON1X>, + <&cmu_disp CLK_SCLK_DECON_VCLK>, + <&cmu_disp CLK_SCLK_DECON_ECLK>, + <&cmu_disp CLK_SCLK_DSD>; clock-names = "pclk", "aclk_decon", "aclk_smmu_decon0x", - "aclk_xiu_decon0x", "pclk_smmu_decon0x", - "aclk_smmu_decon1x", "aclk_xiu_decon1x", - "pclk_smmu_decon1x", "sclk_decon_vclk", - "sclk_decon_eclk", "dsd"; + "aclk_xiu_decon0x", "pclk_smmu_decon0x", + "aclk_smmu_decon1x", "aclk_xiu_decon1x", + "pclk_smmu_decon1x", "sclk_decon_vclk", + "sclk_decon_eclk", "dsd"; power-domains = <&pd_disp>; interrupt-names = "fifo", "vsync", "lcd_sys"; interrupts = , , ; samsung,disp-sysreg = <&syscon_disp>; - status = "disabled"; iommus = <&sysmmu_decon0x>, <&sysmmu_decon1x>; iommu-names = "m0", "m1"; + status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; + decon_to_mic: endpoint { remote-endpoint = <&mic_to_decon>; @@ -1015,9 +1055,10 @@ decon_tv: decon@13880000 { interrupts = , , ; - status = "disabled"; iommus = <&sysmmu_tv0x>, <&sysmmu_tv1x>; iommu-names = "m0", "m1"; + + status = "disabled"; }; dsi: dsi@13900000 { @@ -1027,26 +1068,28 @@ dsi: dsi@13900000 { phys = <&mipi_phy 1>; phy-names = "dsim"; clocks = <&cmu_disp CLK_PCLK_DSIM0>, - <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8>, - <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0>, - <&cmu_disp CLK_SCLK_RGB_VCLK_TO_DSIM0>, - <&cmu_disp CLK_SCLK_DSIM0>; + <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8>, + <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0>, + <&cmu_disp CLK_SCLK_RGB_VCLK_TO_DSIM0>, + <&cmu_disp CLK_SCLK_DSIM0>; clock-names = "bus_clk", - "phyclk_mipidphy0_bitclkdiv8", - "phyclk_mipidphy0_rxclkesc0", - "sclk_rgb_vclk_to_dsim0", - "sclk_mipi"; + "phyclk_mipidphy0_bitclkdiv8", + "phyclk_mipidphy0_rxclkesc0", + "sclk_rgb_vclk_to_dsim0", + "sclk_mipi"; power-domains = <&pd_disp>; - status = "disabled"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; + ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; + dsi_to_mic: endpoint { remote-endpoint = <&mic_to_dsi>; }; @@ -1058,10 +1101,11 @@ mic: mic@13930000 { compatible = "samsung,exynos5433-mic"; reg = <0x13930000 0x48>; clocks = <&cmu_disp CLK_PCLK_MIC0>, - <&cmu_disp CLK_SCLK_RGB_VCLK_TO_MIC0>; + <&cmu_disp CLK_SCLK_RGB_VCLK_TO_MIC0>; clock-names = "pclk_mic0", "sclk_rgb_vclk_to_mic0"; power-domains = <&pd_disp>; samsung,disp-syscon = <&syscon_disp>; + status = "disabled"; ports { @@ -1070,6 +1114,7 @@ ports { port@0 { reg = <0>; + mic_to_decon: endpoint { remote-endpoint = <&decon_to_mic>; @@ -1078,6 +1123,7 @@ mic_to_decon: endpoint { port@1 { reg = <1>; + mic_to_dsi: endpoint { remote-endpoint = <&dsi_to_mic>; }; @@ -1090,24 +1136,25 @@ hdmi: hdmi@13970000 { reg = <0x13970000 0x70000>; interrupts = ; clocks = <&cmu_disp CLK_PCLK_HDMI>, - <&cmu_disp CLK_PCLK_HDMIPHY>, - <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>, - <&cmu_disp CLK_PHYCLK_HDMI_PIXEL>, - <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>, - <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>, - <&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>, - <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>, - <&xxti>, <&cmu_disp CLK_SCLK_HDMI_SPDIF>; + <&cmu_disp CLK_PCLK_HDMIPHY>, + <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>, + <&cmu_disp CLK_PHYCLK_HDMI_PIXEL>, + <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>, + <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>, + <&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>, + <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>, + <&xxti>, <&cmu_disp CLK_SCLK_HDMI_SPDIF>; clock-names = "hdmi_pclk", "hdmi_i_pclk", - "i_tmds_clk", "i_pixel_clk", - "tmds_clko", "tmds_clko_user", - "pixel_clko", "pixel_clko_user", - "oscclk", "i_spdif_clk"; + "i_tmds_clk", "i_pixel_clk", + "tmds_clko", "tmds_clko_user", + "pixel_clko", "pixel_clko_user", + "oscclk", "i_spdif_clk"; phy = <&hdmiphy>; ddc = <&hsi2c_11>; samsung,syscon-phandle = <&pmu_system_controller>; samsung,sysreg-phandle = <&syscon_disp>; #sound-dai-cells = <0>; + status = "disabled"; }; @@ -1143,13 +1190,13 @@ gsc_0: video-scaler@13c00000 { compatible = "samsung,exynos5433-gsc"; reg = <0x13c00000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk", "aclk_xiu", - "aclk_gsclbend", "gsd"; clocks = <&cmu_gscl CLK_PCLK_GSCL0>, <&cmu_gscl CLK_ACLK_GSCL0>, <&cmu_gscl CLK_ACLK_XIU_GSCLX>, <&cmu_gscl CLK_ACLK_GSCLBEND_333>, <&cmu_gscl CLK_ACLK_GSD>; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend", "gsd"; iommus = <&sysmmu_gscl0>; power-domains = <&pd_gscl>; }; @@ -1158,13 +1205,13 @@ gsc_1: video-scaler@13c10000 { compatible = "samsung,exynos5433-gsc"; reg = <0x13c10000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk", "aclk_xiu", - "aclk_gsclbend", "gsd"; clocks = <&cmu_gscl CLK_PCLK_GSCL1>, <&cmu_gscl CLK_ACLK_GSCL1>, <&cmu_gscl CLK_ACLK_XIU_GSCLX>, <&cmu_gscl CLK_ACLK_GSCLBEND_333>, <&cmu_gscl CLK_ACLK_GSD>; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend", "gsd"; iommus = <&sysmmu_gscl1>; power-domains = <&pd_gscl>; }; @@ -1173,13 +1220,13 @@ gsc_2: video-scaler@13c20000 { compatible = "samsung,exynos5433-gsc"; reg = <0x13c20000 0x1000>; interrupts = ; - clock-names = "pclk", "aclk", "aclk_xiu", - "aclk_gsclbend", "gsd"; clocks = <&cmu_gscl CLK_PCLK_GSCL2>, <&cmu_gscl CLK_ACLK_GSCL2>, <&cmu_gscl CLK_ACLK_XIU_GSCLX>, <&cmu_gscl CLK_ACLK_GSCLBEND_333>, <&cmu_gscl CLK_ACLK_GSD>; + clock-names = "pclk", "aclk", "aclk_xiu", + "aclk_gsclbend", "gsd"; iommus = <&sysmmu_gscl2>; power-domains = <&pd_gscl>; }; @@ -1195,6 +1242,7 @@ gpu: gpu@14ac0000 { clock-names = "core"; power-domains = <&pd_g3d>; operating-points-v2 = <&gpu_opp_table>; + status = "disabled"; gpu_opp_table: opp-table { @@ -1204,30 +1252,37 @@ opp-160000000 { opp-hz = /bits/ 64 <160000000>; opp-microvolt = <1000000>; }; + opp-267000000 { opp-hz = /bits/ 64 <267000000>; opp-microvolt = <1000000>; }; + opp-350000000 { opp-hz = /bits/ 64 <350000000>; opp-microvolt = <1025000>; }; + opp-420000000 { opp-hz = /bits/ 64 <420000000>; opp-microvolt = <1025000>; }; + opp-500000000 { opp-hz = /bits/ 64 <500000000>; opp-microvolt = <1075000>; }; + opp-550000000 { opp-hz = /bits/ 64 <550000000>; opp-microvolt = <1125000>; }; + opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1150000>; }; + opp-700000000 { opp-hz = /bits/ 64 <700000000>; opp-microvolt = <1150000>; @@ -1239,10 +1294,10 @@ scaler_0: scaler@15000000 { compatible = "samsung,exynos5433-scaler"; reg = <0x15000000 0x1294>; interrupts = <0 402 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "pclk", "aclk", "aclk_xiu"; clocks = <&cmu_mscl CLK_PCLK_M2MSCALER0>, <&cmu_mscl CLK_ACLK_M2MSCALER0>, <&cmu_mscl CLK_ACLK_XIU_MSCLX>; + clock-names = "pclk", "aclk", "aclk_xiu"; iommus = <&sysmmu_scaler_0>; power-domains = <&pd_mscl>; }; @@ -1251,10 +1306,10 @@ scaler_1: scaler@15010000 { compatible = "samsung,exynos5433-scaler"; reg = <0x15010000 0x1294>; interrupts = <0 403 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "pclk", "aclk", "aclk_xiu"; clocks = <&cmu_mscl CLK_PCLK_M2MSCALER1>, <&cmu_mscl CLK_ACLK_M2MSCALER1>, <&cmu_mscl CLK_ACLK_XIU_MSCLX>; + clock-names = "pclk", "aclk", "aclk_xiu"; iommus = <&sysmmu_scaler_1>; power-domains = <&pd_mscl>; }; @@ -1263,11 +1318,11 @@ jpeg: codec@15020000 { compatible = "samsung,exynos5433-jpeg"; reg = <0x15020000 0x10000>; interrupts = ; - clock-names = "pclk", "aclk", "aclk_xiu", "sclk"; clocks = <&cmu_mscl CLK_PCLK_JPEG>, <&cmu_mscl CLK_ACLK_JPEG>, <&cmu_mscl CLK_ACLK_XIU_MSCLX>, <&cmu_mscl CLK_SCLK_JPEG>; + clock-names = "pclk", "aclk", "aclk_xiu", "sclk"; iommus = <&sysmmu_jpeg>; power-domains = <&pd_mscl>; }; @@ -1276,10 +1331,10 @@ mfc: codec@152e0000 { compatible = "samsung,exynos5433-mfc"; reg = <0x152e0000 0x10000>; interrupts = ; - clock-names = "pclk", "aclk", "aclk_xiu"; clocks = <&cmu_mfc CLK_PCLK_MFC>, <&cmu_mfc CLK_ACLK_MFC>, <&cmu_mfc CLK_ACLK_XIU_MFCX>; + clock-names = "pclk", "aclk", "aclk_xiu"; iommus = <&sysmmu_mfc_0>, <&sysmmu_mfc_1>; iommu-names = "left", "right"; power-domains = <&pd_mfc>; @@ -1289,9 +1344,9 @@ sysmmu_decon0x: sysmmu@13a00000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13a00000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_disp CLK_ACLK_SMMU_DECON0X>, - <&cmu_disp CLK_PCLK_SMMU_DECON0X>; + <&cmu_disp CLK_PCLK_SMMU_DECON0X>; + clock-names = "aclk", "pclk"; power-domains = <&pd_disp>; #iommu-cells = <0>; }; @@ -1300,9 +1355,9 @@ sysmmu_decon1x: sysmmu@13a10000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13a10000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_disp CLK_ACLK_SMMU_DECON1X>, - <&cmu_disp CLK_PCLK_SMMU_DECON1X>; + <&cmu_disp CLK_PCLK_SMMU_DECON1X>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_disp>; }; @@ -1311,9 +1366,9 @@ sysmmu_tv0x: sysmmu@13a20000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13a20000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_disp CLK_ACLK_SMMU_TV0X>, - <&cmu_disp CLK_PCLK_SMMU_TV0X>; + <&cmu_disp CLK_PCLK_SMMU_TV0X>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_disp>; }; @@ -1322,9 +1377,9 @@ sysmmu_tv1x: sysmmu@13a30000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13a30000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_disp CLK_ACLK_SMMU_TV1X>, - <&cmu_disp CLK_PCLK_SMMU_TV1X>; + <&cmu_disp CLK_PCLK_SMMU_TV1X>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_disp>; }; @@ -1333,9 +1388,9 @@ sysmmu_gscl0: sysmmu@13c80000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13c80000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL0>, <&cmu_gscl CLK_PCLK_SMMU_GSCL0>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_gscl>; }; @@ -1344,9 +1399,9 @@ sysmmu_gscl1: sysmmu@13c90000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13c90000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL1>, <&cmu_gscl CLK_PCLK_SMMU_GSCL1>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_gscl>; }; @@ -1355,9 +1410,9 @@ sysmmu_gscl2: sysmmu@13ca0000 { compatible = "samsung,exynos-sysmmu"; reg = <0x13ca0000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_gscl CLK_ACLK_SMMU_GSCL2>, <&cmu_gscl CLK_PCLK_SMMU_GSCL2>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_gscl>; }; @@ -1366,9 +1421,9 @@ sysmmu_scaler_0: sysmmu@15040000 { compatible = "samsung,exynos-sysmmu"; reg = <0x15040000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER0>, - <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>; + <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER0>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_mscl>; }; @@ -1377,9 +1432,9 @@ sysmmu_scaler_1: sysmmu@15050000 { compatible = "samsung,exynos-sysmmu"; reg = <0x15050000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_mscl CLK_ACLK_SMMU_M2MSCALER1>, - <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>; + <&cmu_mscl CLK_PCLK_SMMU_M2MSCALER1>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_mscl>; }; @@ -1388,9 +1443,9 @@ sysmmu_jpeg: sysmmu@15060000 { compatible = "samsung,exynos-sysmmu"; reg = <0x15060000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_mscl CLK_ACLK_SMMU_JPEG>, - <&cmu_mscl CLK_PCLK_SMMU_JPEG>; + <&cmu_mscl CLK_PCLK_SMMU_JPEG>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_mscl>; }; @@ -1399,9 +1454,9 @@ sysmmu_mfc_0: sysmmu@15200000 { compatible = "samsung,exynos-sysmmu"; reg = <0x15200000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_mfc CLK_ACLK_SMMU_MFC_0>, - <&cmu_mfc CLK_PCLK_SMMU_MFC_0>; + <&cmu_mfc CLK_PCLK_SMMU_MFC_0>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_mfc>; }; @@ -1410,9 +1465,9 @@ sysmmu_mfc_1: sysmmu@15210000 { compatible = "samsung,exynos-sysmmu"; reg = <0x15210000 0x1000>; interrupts = ; - clock-names = "aclk", "pclk"; clocks = <&cmu_mfc CLK_ACLK_SMMU_MFC_1>, - <&cmu_mfc CLK_PCLK_SMMU_MFC_1>; + <&cmu_mfc CLK_PCLK_SMMU_MFC_1>; + clock-names = "aclk", "pclk"; #iommu-cells = <0>; power-domains = <&pd_mfc>; }; @@ -1422,10 +1477,11 @@ serial_0: serial@14c10000 { reg = <0x14c10000 0x100>; interrupts = ; clocks = <&cmu_peric CLK_PCLK_UART0>, - <&cmu_peric CLK_SCLK_UART0>; + <&cmu_peric CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; pinctrl-0 = <&uart0_bus>; + status = "disabled"; }; @@ -1434,10 +1490,11 @@ serial_1: serial@14c20000 { reg = <0x14c20000 0x100>; interrupts = ; clocks = <&cmu_peric CLK_PCLK_UART1>, - <&cmu_peric CLK_SCLK_UART1>; + <&cmu_peric CLK_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; pinctrl-0 = <&uart1_bus>; + status = "disabled"; }; @@ -1446,10 +1503,11 @@ serial_2: serial@14c30000 { reg = <0x14c30000 0x100>; interrupts = ; clocks = <&cmu_peric CLK_PCLK_UART2>, - <&cmu_peric CLK_SCLK_UART2>; + <&cmu_peric CLK_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; pinctrl-0 = <&uart2_bus>; + status = "disabled"; }; @@ -1462,14 +1520,15 @@ spi_0: spi@14d20000 { #address-cells = <1>; #size-cells = <0>; clocks = <&cmu_peric CLK_PCLK_SPI0>, - <&cmu_peric CLK_SCLK_SPI0>, - <&cmu_peric CLK_SCLK_IOCLK_SPI0>; + <&cmu_peric CLK_SCLK_SPI0>, + <&cmu_peric CLK_SCLK_IOCLK_SPI0>; clock-names = "spi", "spi_busclk0", "spi_ioclk"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; num-cs = <1>; fifo-depth = <256>; + status = "disabled"; }; @@ -1482,14 +1541,15 @@ spi_1: spi@14d30000 { #address-cells = <1>; #size-cells = <0>; clocks = <&cmu_peric CLK_PCLK_SPI1>, - <&cmu_peric CLK_SCLK_SPI1>, - <&cmu_peric CLK_SCLK_IOCLK_SPI1>; + <&cmu_peric CLK_SCLK_SPI1>, + <&cmu_peric CLK_SCLK_IOCLK_SPI1>; clock-names = "spi", "spi_busclk0", "spi_ioclk"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; num-cs = <1>; fifo-depth = <64>; + status = "disabled"; }; @@ -1502,14 +1562,15 @@ spi_2: spi@14d40000 { #address-cells = <1>; #size-cells = <0>; clocks = <&cmu_peric CLK_PCLK_SPI2>, - <&cmu_peric CLK_SCLK_SPI2>, - <&cmu_peric CLK_SCLK_IOCLK_SPI2>; + <&cmu_peric CLK_SCLK_SPI2>, + <&cmu_peric CLK_SCLK_IOCLK_SPI2>; clock-names = "spi", "spi_busclk0", "spi_ioclk"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; num-cs = <1>; fifo-depth = <64>; + status = "disabled"; }; @@ -1522,14 +1583,15 @@ spi_3: spi@14d50000 { #address-cells = <1>; #size-cells = <0>; clocks = <&cmu_peric CLK_PCLK_SPI3>, - <&cmu_peric CLK_SCLK_SPI3>, - <&cmu_peric CLK_SCLK_IOCLK_SPI3>; + <&cmu_peric CLK_SCLK_SPI3>, + <&cmu_peric CLK_SCLK_IOCLK_SPI3>; clock-names = "spi", "spi_busclk0", "spi_ioclk"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi3_bus>; num-cs = <1>; fifo-depth = <64>; + status = "disabled"; }; @@ -1542,14 +1604,15 @@ spi_4: spi@14d00000 { #address-cells = <1>; #size-cells = <0>; clocks = <&cmu_peric CLK_PCLK_SPI4>, - <&cmu_peric CLK_SCLK_SPI4>, - <&cmu_peric CLK_SCLK_IOCLK_SPI4>; + <&cmu_peric CLK_SCLK_SPI4>, + <&cmu_peric CLK_SCLK_IOCLK_SPI4>; clock-names = "spi", "spi_busclk0", "spi_ioclk"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi4_bus>; num-cs = <1>; fifo-depth = <64>; + status = "disabled"; }; @@ -1557,9 +1620,10 @@ adc: adc@14d10000 { compatible = "samsung,exynos5433-adc", "samsung,exynos7-adc"; reg = <0x14d10000 0x100>; interrupts = ; - clock-names = "adc"; clocks = <&cmu_peric CLK_PCLK_ADCIF>; + clock-names = "adc"; #io-channel-cells = <1>; + status = "disabled"; }; @@ -1575,6 +1639,7 @@ i2s1: i2s@14d60000 { clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; #clock-cells = <1>; #sound-dai-cells = <1>; + status = "disabled"; }; @@ -1590,6 +1655,7 @@ pwm: pwm@14dd0000 { clocks = <&cmu_peric CLK_PCLK_PWM>; clock-names = "timers"; #pwm-cells = <3>; + status = "disabled"; }; @@ -1604,6 +1670,7 @@ hsi2c_0: i2c@14e40000 { pinctrl-0 = <&hs_i2c0_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C0>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1618,6 +1685,7 @@ hsi2c_1: i2c@14e50000 { pinctrl-0 = <&hs_i2c1_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C1>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1632,6 +1700,7 @@ hsi2c_2: i2c@14e60000 { pinctrl-0 = <&hs_i2c2_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C2>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1646,6 +1715,7 @@ hsi2c_3: i2c@14e70000 { pinctrl-0 = <&hs_i2c3_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C3>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1660,6 +1730,7 @@ hsi2c_4: i2c@14ec0000 { pinctrl-0 = <&hs_i2c4_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C4>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1674,6 +1745,7 @@ hsi2c_5: i2c@14ed0000 { pinctrl-0 = <&hs_i2c5_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C5>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1688,6 +1760,7 @@ hsi2c_6: i2c@14ee0000 { pinctrl-0 = <&hs_i2c6_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C6>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1702,6 +1775,7 @@ hsi2c_7: i2c@14ef0000 { pinctrl-0 = <&hs_i2c7_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C7>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1716,6 +1790,7 @@ hsi2c_8: i2c@14d90000 { pinctrl-0 = <&hs_i2c8_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C8>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1730,6 +1805,7 @@ hsi2c_9: i2c@14da0000 { pinctrl-0 = <&hs_i2c9_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C9>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1744,6 +1820,7 @@ hsi2c_10: i2c@14de0000 { pinctrl-0 = <&hs_i2c10_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C10>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -1758,26 +1835,28 @@ hsi2c_11: i2c@14df0000 { pinctrl-0 = <&hs_i2c11_bus>; clocks = <&cmu_peric CLK_PCLK_HSI2C11>; clock-names = "hsi2c"; + status = "disabled"; }; usbdrd30: usb@15400000 { compatible = "samsung,exynos5433-dwusb3"; clocks = <&cmu_fsys CLK_ACLK_USBDRD30>, - <&cmu_fsys CLK_SCLK_USBDRD30>, - <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>, - <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>; + <&cmu_fsys CLK_SCLK_USBDRD30>, + <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>, + <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>; clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x15400000 0x10000>; + status = "disabled"; usbdrd_dwc3: usb@0 { compatible = "snps,dwc3"; clocks = <&cmu_fsys CLK_SCLK_USBDRD30>, - <&cmu_fsys CLK_ACLK_USBDRD30>, - <&cmu_fsys CLK_SCLK_USBDRD30>; + <&cmu_fsys CLK_ACLK_USBDRD30>, + <&cmu_fsys CLK_SCLK_USBDRD30>; clock-names = "ref", "bus_early", "suspend"; reg = <0x0 0x10000>; interrupts = ; @@ -1790,13 +1869,13 @@ usbdrd30_phy: phy@15500000 { compatible = "samsung,exynos5433-usbdrd-phy"; reg = <0x15500000 0x100>; clocks = <&cmu_fsys CLK_ACLK_USBDRD30>, <&xxti>, - <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>, - <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>, - <&cmu_fsys CLK_SCLK_USBDRD30>; - clock-names = "phy", "ref", "phy_utmi", "phy_pipe", - "itp"; + <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK>, + <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK>, + <&cmu_fsys CLK_SCLK_USBDRD30>; + clock-names = "phy", "ref", "phy_utmi", "phy_pipe", "itp"; #phy-cells = <1>; samsung,pmu-syscon = <&pmu_system_controller>; + status = "disabled"; }; @@ -1804,33 +1883,34 @@ usbhost30_phy: phy@15580000 { compatible = "samsung,exynos5433-usbdrd-phy"; reg = <0x15580000 0x100>; clocks = <&cmu_fsys CLK_ACLK_USBHOST30>, <&xxti>, - <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK>, - <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK>, - <&cmu_fsys CLK_SCLK_USBHOST30>; - clock-names = "phy", "ref", "phy_utmi", "phy_pipe", - "itp"; + <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK>, + <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK>, + <&cmu_fsys CLK_SCLK_USBHOST30>; + clock-names = "phy", "ref", "phy_utmi", "phy_pipe", "itp"; #phy-cells = <1>; samsung,pmu-syscon = <&pmu_system_controller>; + status = "disabled"; }; usbhost30: usb@15a00000 { compatible = "samsung,exynos5433-dwusb3"; clocks = <&cmu_fsys CLK_ACLK_USBHOST30>, - <&cmu_fsys CLK_SCLK_USBHOST30>, - <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK>, - <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK>; + <&cmu_fsys CLK_SCLK_USBHOST30>, + <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK>, + <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK>; clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x15a00000 0x10000>; + status = "disabled"; usbhost_dwc3: usb@0 { compatible = "snps,dwc3"; clocks = <&cmu_fsys CLK_SCLK_USBHOST30>, - <&cmu_fsys CLK_ACLK_USBHOST30>, - <&cmu_fsys CLK_SCLK_USBHOST30>; + <&cmu_fsys CLK_ACLK_USBHOST30>, + <&cmu_fsys CLK_SCLK_USBHOST30>; clock-names = "ref", "bus_early", "suspend"; reg = <0x0 0x10000>; interrupts = ; @@ -1847,9 +1927,10 @@ mshc_0: mmc@15540000 { #size-cells = <0>; reg = <0x15540000 0x2000>; clocks = <&cmu_fsys CLK_ACLK_MMC0>, - <&cmu_fsys CLK_SCLK_MMC0>; + <&cmu_fsys CLK_SCLK_MMC0>; clock-names = "biu", "ciu"; fifo-depth = <0x40>; + status = "disabled"; }; @@ -1861,9 +1942,10 @@ mshc_1: mmc@15550000 { #size-cells = <0>; reg = <0x15550000 0x2000>; clocks = <&cmu_fsys CLK_ACLK_MMC1>, - <&cmu_fsys CLK_SCLK_MMC1>; + <&cmu_fsys CLK_SCLK_MMC1>; clock-names = "biu", "ciu"; fifo-depth = <0x40>; + status = "disabled"; }; @@ -1875,9 +1957,10 @@ mshc_2: mmc@15560000 { #size-cells = <0>; reg = <0x15560000 0x2000>; clocks = <&cmu_fsys CLK_ACLK_MMC2>, - <&cmu_fsys CLK_SCLK_MMC2>; + <&cmu_fsys CLK_SCLK_MMC2>; clock-names = "biu", "ciu"; fifo-depth = <0x40>; + status = "disabled"; }; @@ -1929,14 +2012,15 @@ i2s0: i2s@11440000 { #address-cells = <1>; #size-cells = <0>; clocks = <&cmu_aud CLK_PCLK_AUD_I2S>, - <&cmu_aud CLK_SCLK_AUD_I2S>, - <&cmu_aud CLK_SCLK_I2S_BCLK>; + <&cmu_aud CLK_SCLK_AUD_I2S>, + <&cmu_aud CLK_SCLK_I2S_BCLK>; clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; #clock-cells = <1>; pinctrl-names = "default"; pinctrl-0 = <&i2s0_bus>; power-domains = <&pd_aud>; #sound-dai-cells = <1>; + status = "disabled"; }; @@ -1945,11 +2029,12 @@ serial_3: serial@11460000 { reg = <0x11460000 0x100>; interrupts = ; clocks = <&cmu_aud CLK_PCLK_AUD_UART>, - <&cmu_aud CLK_SCLK_AUD_UART>; + <&cmu_aud CLK_SCLK_AUD_UART>; clock-names = "uart", "clk_uart_baud0"; pinctrl-names = "default"; pinctrl-0 = <&uart_aud_bus>; power-domains = <&pd_aud>; + status = "disabled"; }; }; @@ -1960,6 +2045,7 @@ pcie_phy: pcie-phy@15680000 { samsung,pmu-syscon = <&pmu_system_controller>; samsung,fsys-sysreg = <&syscon_fsys>; #phy-cells = <0>; + status = "disabled"; }; @@ -1982,20 +2068,20 @@ pcie: pcie@15700000 { phys = <&pcie_phy>; ranges = <0x81000000 0 0 0x0c001000 0 0x00010000>, <0x82000000 0 0x0c011000 0x0c011000 0 0x03feefff>; + status = "disabled"; }; }; + thermal_zones: thermal-zones { + }; + timer: timer { compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; + interrupts = , + , + , + ; }; }; diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts index 1f2eddcebdd9..b3d5b447aeb6 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts +++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts @@ -68,9 +68,10 @@ &serial_2 { }; &rtc { - status = "okay"; clocks = <&clock_ccore PCLK_RTC>, <&s2mps15_osc S2MPS11_CLK_AP>; clock-names = "rtc", "rtc_src"; + + status = "okay"; }; &watchdog { @@ -79,6 +80,7 @@ &watchdog { &adc { vdd-supply = <&ldo3_reg>; + status = "okay"; }; @@ -97,8 +99,7 @@ pmic@66 { s2mps15_osc: clocks { compatible = "samsung,s2mps13-clk"; #clock-cells = <1>; - clock-output-names = "s2mps13_ap", "s2mps13_cp", - "s2mps13_bt"; + clock-output-names = "s2mps13_ap", "s2mps13_cp", "s2mps13_bt"; }; regulators { @@ -360,7 +361,6 @@ pmic_irq: pmic-irq-pins { }; &mmc_0 { - status = "okay"; cap-mmc-highspeed; mmc-ddr-1_8v; mmc-hs200-1_8v; @@ -373,10 +373,11 @@ &mmc_0 { pinctrl-names = "default"; pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4 &sd0_bus8>; bus-width = <8>; + + status = "okay"; }; &mmc_2 { - status = "okay"; cap-sd-highspeed; card-detect-delay = <200>; clock-frequency = <400000000>; @@ -389,6 +390,8 @@ &mmc_2 { vmmc-supply = <&ldo17_reg>; vqmmc-supply = <&ldo2_reg>; disable-wp; + + status = "okay"; }; &pinctrl_bus1 { diff --git a/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi b/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi index d3301b8bd364..ecae9550801c 100644 --- a/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi @@ -12,36 +12,43 @@ cpu-alert-0 { hysteresis = <10000>; /* millicelsius */ type = "passive"; }; + cpu-alert-1 { temperature = <80000>; /* millicelsius */ hysteresis = <10000>; /* millicelsius */ type = "passive"; }; + cpu-alert-2 { temperature = <85000>; /* millicelsius */ hysteresis = <10000>; /* millicelsius */ type = "passive"; }; + cpu-alert-3 { temperature = <90000>; /* millicelsius */ hysteresis = <10000>; /* millicelsius */ type = "passive"; }; + cpu-alert-4 { temperature = <95000>; /* millicelsius */ hysteresis = <10000>; /* millicelsius */ type = "passive"; }; + cpu-alert-5 { temperature = <100000>; /* millicelsius */ hysteresis = <10000>; /* millicelsius */ type = "passive"; }; + cpu-alert-6 { temperature = <110000>; /* millicelsius */ hysteresis = <10000>; /* millicelsius */ type = "passive"; }; + cpu-crit-0 { temperature = <115000>; /* millicelsius */ hysteresis = <0>; /* millicelsius */ diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 9cb6bd61262e..20e24db952fa 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -286,6 +286,7 @@ serial_0: serial@13630000 { clocks = <&clock_peric0 PCLK_UART0>, <&clock_peric0 SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; }; @@ -296,6 +297,7 @@ serial_1: serial@14c20000 { clocks = <&clock_peric1 PCLK_UART1>, <&clock_peric1 SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; }; @@ -306,6 +308,7 @@ serial_2: serial@14c30000 { clocks = <&clock_peric1 PCLK_UART2>, <&clock_peric1 SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; }; @@ -316,6 +319,7 @@ serial_3: serial@14c40000 { clocks = <&clock_peric1 PCLK_UART3>, <&clock_peric1 SCLK_UART3>; clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; }; @@ -388,6 +392,7 @@ hsi2c_0: i2c@13640000 { pinctrl-0 = <&hs_i2c0_bus>; clocks = <&clock_peric0 PCLK_HSI2C0>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -401,6 +406,7 @@ hsi2c_1: i2c@13650000 { pinctrl-0 = <&hs_i2c1_bus>; clocks = <&clock_peric0 PCLK_HSI2C1>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -414,6 +420,7 @@ hsi2c_2: i2c@14e60000 { pinctrl-0 = <&hs_i2c2_bus>; clocks = <&clock_peric1 PCLK_HSI2C2>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -427,6 +434,7 @@ hsi2c_3: i2c@14e70000 { pinctrl-0 = <&hs_i2c3_bus>; clocks = <&clock_peric1 PCLK_HSI2C3>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -440,6 +448,7 @@ hsi2c_4: i2c@13660000 { pinctrl-0 = <&hs_i2c4_bus>; clocks = <&clock_peric0 PCLK_HSI2C4>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -453,6 +462,7 @@ hsi2c_5: i2c@13670000 { pinctrl-0 = <&hs_i2c5_bus>; clocks = <&clock_peric0 PCLK_HSI2C5>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -466,6 +476,7 @@ hsi2c_6: i2c@14e00000 { pinctrl-0 = <&hs_i2c6_bus>; clocks = <&clock_peric1 PCLK_HSI2C6>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -479,6 +490,7 @@ hsi2c_7: i2c@13e10000 { pinctrl-0 = <&hs_i2c7_bus>; clocks = <&clock_peric1 PCLK_HSI2C7>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -492,6 +504,7 @@ hsi2c_8: i2c@14e20000 { pinctrl-0 = <&hs_i2c8_bus>; clocks = <&clock_peric1 PCLK_HSI2C8>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -505,6 +518,7 @@ hsi2c_9: i2c@13680000 { pinctrl-0 = <&hs_i2c9_bus>; clocks = <&clock_peric0 PCLK_HSI2C9>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -518,6 +532,7 @@ hsi2c_10: i2c@13690000 { pinctrl-0 = <&hs_i2c10_bus>; clocks = <&clock_peric0 PCLK_HSI2C10>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -531,6 +546,7 @@ hsi2c_11: i2c@136a0000 { pinctrl-0 = <&hs_i2c11_bus>; clocks = <&clock_peric0 PCLK_HSI2C11>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -546,6 +562,7 @@ rtc: rtc@10590000 { ; clocks = <&clock_ccore PCLK_RTC>; clock-names = "rtc"; + status = "disabled"; }; @@ -556,6 +573,7 @@ watchdog: watchdog@101d0000 { clocks = <&clock_peris PCLK_WDT>; clock-names = "watchdog"; samsung,syscon-phandle = <&pmu_system_controller>; + status = "disabled"; }; @@ -567,6 +585,7 @@ gpu: gpu@14ac0000 { , ; interrupt-names = "job", "mmu", "gpu"; + status = "disabled"; /* TODO: operating points for DVFS, cooling device */ }; @@ -581,6 +600,7 @@ mmc_0: mmc@15740000 { <&clock_top1 CLK_SCLK_MMC0>; clock-names = "biu", "ciu"; fifo-depth = <0x40>; + status = "disabled"; }; @@ -594,6 +614,7 @@ mmc_1: mmc@15750000 { <&clock_top1 CLK_SCLK_MMC1>; clock-names = "biu", "ciu"; fifo-depth = <0x40>; + status = "disabled"; }; @@ -607,6 +628,7 @@ mmc_2: mmc@15560000 { <&clock_top1 CLK_SCLK_MMC2>; clock-names = "biu", "ciu"; fifo-depth = <0x40>; + status = "disabled"; }; @@ -617,6 +639,7 @@ adc: adc@13620000 { clocks = <&clock_peric0 PCLK_ADCIF>; clock-names = "adc"; #io-channel-cells = <1>; + status = "disabled"; }; @@ -647,19 +670,20 @@ tmuctrl_0: tmu@10060000 { ufs: ufs@15570000 { compatible = "samsung,exynos7-ufs"; reg = <0x15570000 0x100>, /* 0: HCI standard */ - <0x15570100 0x100>, /* 1: Vendor specificed */ - <0x15571000 0x200>, /* 2: UNIPRO */ - <0x15572000 0x300>; /* 3: UFS protector */ + <0x15570100 0x100>, /* 1: Vendor specified */ + <0x15571000 0x200>, /* 2: UNIPRO */ + <0x15572000 0x300>; /* 3: UFS protector */ reg-names = "hci", "vs_hci", "unipro", "ufsp"; interrupts = ; clocks = <&clock_fsys1 ACLK_UFS20_LINK>, - <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; + <&clock_fsys1 SCLK_UFSUNIPRO20_USER>; clock-names = "core_clk", "sclk_unipro_main"; freq-table-hz = <0 0>, <0 0>; pinctrl-names = "default"; pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; phys = <&ufs_phy>; phy-names = "ufs-phy"; + status = "disabled"; }; @@ -682,10 +706,10 @@ usbdrd_phy: phy@15500000 { compatible = "samsung,exynos7-usbdrd-phy"; reg = <0x15500000 0x100>; clocks = <&clock_fsys0 ACLK_USBDRD300>, - <&clock_fsys0 OSCCLK_PHY_CLKOUT_USB30_PHY>, - <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER>, - <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>, - <&clock_fsys0 SCLK_USBDRD300_REFCLK>; + <&clock_fsys0 OSCCLK_PHY_CLKOUT_USB30_PHY>, + <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PHYCLK_USER>, + <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>, + <&clock_fsys0 SCLK_USBDRD300_REFCLK>; clock-names = "phy", "ref", "phy_utmi", "phy_pipe", "itp"; samsung,pmu-syscon = <&pmu_system_controller>; #phy-cells = <1>; @@ -694,10 +718,10 @@ usbdrd_phy: phy@15500000 { usbdrd: usb@15400000 { compatible = "samsung,exynos7-dwusb3"; clocks = <&clock_fsys0 ACLK_USBDRD300>, - <&clock_fsys0 SCLK_USBDRD300_SUSPENDCLK>, - <&clock_fsys0 ACLK_AXIUS_USBDRD30X_FSYS0X>; + <&clock_fsys0 SCLK_USBDRD300_SUSPENDCLK>, + <&clock_fsys0 ACLK_AXIUS_USBDRD30X_FSYS0X>; clock-names = "usbdrd30", "usbdrd30_susp_clk", - "usbdrd30_axius_clk"; + "usbdrd30_axius_clk"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x15400000 0x10000>; @@ -723,14 +747,10 @@ atlas_thermal: cluster0-thermal { timer { compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; + interrupts = , + , + , + ; }; }; diff --git a/arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts b/arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts index de30d0970336..02bab3ab2711 100644 --- a/arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts +++ b/arch/arm64/boot/dts/exynos/exynos7870-j6lte.dts @@ -398,8 +398,8 @@ accelerometer@1d { pinctrl-0 = <&accel_irq>; mount-matrix = "-1", "0", "0", - "0", "1", "0", - "0", "0", "-1"; + "0", "1", "0", + "0", "0", "-1"; st,drdy-int-pin = <1>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos7870.dtsi b/arch/arm64/boot/dts/exynos/exynos7870.dtsi index 19f9ae783587..9e3ec6c952f0 100644 --- a/arch/arm64/boot/dts/exynos/exynos7870.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7870.dtsi @@ -36,12 +36,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -51,12 +54,15 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; + core3 { cpu = <&cpu7>; }; @@ -201,8 +207,7 @@ gic: interrupt-controller@104e1000 { <0x104e2000 0x1000>, <0x104e4000 0x2000>, <0x104e6000 0x2000>; - interrupts = ; + interrupts = ; interrupt-controller; #address-cells = <0>; #interrupt-cells = <3>; diff --git a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts index 9d74fa6bfed9..4b1961ca365b 100644 --- a/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts +++ b/arch/arm64/boot/dts/exynos/exynos7885-jackpotlte.dts @@ -62,7 +62,6 @@ power-key { }; &mmc_0 { - status = "okay"; mmc-hs200-1_8v; mmc-hs400-1_8v; cap-mmc-highspeed; @@ -79,6 +78,8 @@ &mmc_0 { pinctrl-names = "default"; pinctrl-0 = <&sd0_clk_fast_slew_rate_3x &sd0_cmd &sd0_rdqs &sd0_bus1 &sd0_bus4 &sd0_bus8>; + + status = "okay"; }; &oscclk { diff --git a/arch/arm64/boot/dts/exynos/exynos7885.dtsi b/arch/arm64/boot/dts/exynos/exynos7885.dtsi index 008228fb319a..6b994b487107 100644 --- a/arch/arm64/boot/dts/exynos/exynos7885.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7885.dtsi @@ -56,18 +56,23 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; + core4 { cpu = <&cpu4>; }; + core5 { cpu = <&cpu5>; }; @@ -77,6 +82,7 @@ cluster1 { core0 { cpu = <&cpu6>; }; + core1 { cpu = <&cpu7>; }; @@ -186,8 +192,7 @@ gic: interrupt-controller@12301000 { <0x12302000 0x2000>, <0x12304000 0x2000>, <0x12306000 0x2000>; - interrupts = ; + interrupts = ; }; cmu_peri: clock-controller@10010000 { @@ -307,6 +312,7 @@ mmc_0: mmc@13500000 { <&cmu_fsys CLK_GOUT_MMC_EMBD_SDCLKIN>; clock-names = "biu", "ciu"; fifo-depth = <0x40>; + status = "disabled"; }; @@ -321,6 +327,7 @@ serial_0: serial@13800000 { <&cmu_peri CLK_GOUT_UART0_EXT_UCLK>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -335,6 +342,7 @@ serial_1: serial@13810000 { <&cmu_peri CLK_GOUT_UART1_EXT_UCLK>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -349,6 +357,7 @@ serial_2: serial@13820000 { <&cmu_peri CLK_GOUT_UART2_EXT_UCLK>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -363,6 +372,7 @@ i2c_0: i2c@13830000 { pinctrl-0 = <&i2c0_bus>; clocks = <&cmu_peri CLK_GOUT_I2C0_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -377,6 +387,7 @@ i2c_1: i2c@13840000 { pinctrl-0 = <&i2c1_bus>; clocks = <&cmu_peri CLK_GOUT_I2C1_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -391,6 +402,7 @@ i2c_2: i2c@13850000 { pinctrl-0 = <&i2c2_bus>; clocks = <&cmu_peri CLK_GOUT_I2C2_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -405,6 +417,7 @@ i2c_3: i2c@13860000 { pinctrl-0 = <&i2c3_bus>; clocks = <&cmu_peri CLK_GOUT_I2C3_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -419,6 +432,7 @@ i2c_4: i2c@13870000 { pinctrl-0 = <&i2c4_bus>; clocks = <&cmu_peri CLK_GOUT_I2C4_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -433,6 +447,7 @@ i2c_5: i2c@13880000 { pinctrl-0 = <&i2c5_bus>; clocks = <&cmu_peri CLK_GOUT_I2C5_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -447,6 +462,7 @@ i2c_6: i2c@13890000 { pinctrl-0 = <&i2c6_bus>; clocks = <&cmu_peri CLK_GOUT_I2C6_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -461,6 +477,7 @@ i2c_7: i2c@11cd0000 { pinctrl-0 = <&i2c7_bus>; clocks = <&cmu_peri CLK_GOUT_I2C7_PCLK>; clock-names = "i2c"; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts b/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts index ab076d326a49..afef32ad4ee2 100644 --- a/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts +++ b/arch/arm64/boot/dts/exynos/exynos850-e850-96.dts @@ -178,7 +178,6 @@ &cmu_hsi { }; &mmc_0 { - status = "okay"; mmc-hs200-1_8v; mmc-hs400-1_8v; cap-mmc-highspeed; @@ -195,6 +194,8 @@ &mmc_0 { pinctrl-names = "default"; pinctrl-0 = <&sd0_clk_pins &sd0_cmd_pins &sd0_rdqs_pins &sd0_nreset_pins &sd0_bus1_pins &sd0_bus4_pins &sd0_bus8_pins>; + + status = "okay"; }; &oscclk { @@ -224,21 +225,24 @@ micro_usb_det_pins: micro-usb-det-pins { }; &rtc { - status = "okay"; clocks = <&cmu_apm CLK_GOUT_RTC_PCLK>, <&rtcclk>; clock-names = "rtc", "rtc_src"; + + status = "okay"; }; &serial_0 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; + + status = "okay"; }; &usbdrd { - status = "okay"; vdd10-supply = <®_dummy>; vdd33-supply = <®_dummy>; + + status = "okay"; }; &usbdrd_dwc3 { @@ -273,6 +277,7 @@ &usbdrd_phy { &usi_uart { samsung,clkreq-on; /* needed for UART mode */ + status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi index 424bc80bde68..e3f1ae8dedbf 100644 --- a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi @@ -509,6 +509,7 @@ gpp0: gpp0-gpio-bank { interrupt-controller; #interrupt-cells = <2>; }; + gpp1: gpp1-gpio-bank { gpio-controller; #gpio-cells = <2>; diff --git a/arch/arm64/boot/dts/exynos/exynos850.dtsi b/arch/arm64/boot/dts/exynos/exynos850.dtsi index 3881f573ec08..911643008b9f 100644 --- a/arch/arm64/boot/dts/exynos/exynos850.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos850.dtsi @@ -61,12 +61,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -76,12 +79,15 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; + core3 { cpu = <&cpu7>; }; @@ -96,24 +102,28 @@ cpu0: cpu@0 { clocks = <&cmu_cpucl0 CLK_CLUSTER0_SCLK>; clock-names = "cluster0_clk"; }; + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x1>; enable-method = "psci"; }; + cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x2>; enable-method = "psci"; }; + cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x3>; enable-method = "psci"; }; + cpu4: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a55"; @@ -122,18 +132,21 @@ cpu4: cpu@100 { clocks = <&cmu_cpucl1 CLK_CLUSTER1_SCLK>; clock-names = "cluster1_clk"; }; + cpu5: cpu@101 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x101>; enable-method = "psci"; }; + cpu6: cpu@102 { device_type = "cpu"; compatible = "arm,cortex-a55"; reg = <0x102>; enable-method = "psci"; }; + cpu7: cpu@103 { device_type = "cpu"; compatible = "arm,cortex-a55"; @@ -207,8 +220,7 @@ gic: interrupt-controller@12a01000 { <0x12a04000 0x2000>, <0x12a06000 0x2000>; interrupt-controller; - interrupts = ; + interrupts = ; }; pmu_system_controller: system-controller@11860000 { @@ -239,6 +251,7 @@ watchdog_cl0: watchdog@10050000 { clock-names = "watchdog", "watchdog_src"; samsung,syscon-phandle = <&pmu_system_controller>; samsung,cluster-index = <0>; + status = "disabled"; }; @@ -250,6 +263,7 @@ watchdog_cl1: watchdog@10060000 { clock-names = "watchdog", "watchdog_src"; samsung,syscon-phandle = <&pmu_system_controller>; samsung,cluster-index = <1>; + status = "disabled"; }; @@ -455,6 +469,7 @@ rtc: rtc@11a30000 { ; clocks = <&cmu_apm CLK_GOUT_RTC_PCLK>; clock-names = "rtc"; + status = "disabled"; }; @@ -469,6 +484,7 @@ mmc_0: mmc@12100000 { <&cmu_core CLK_GOUT_MMC_EMBD_SDCLKIN>; clock-names = "biu", "ciu"; fifo-depth = <0x40>; + status = "disabled"; }; @@ -482,6 +498,7 @@ i2c_0: i2c@13830000 { pinctrl-0 = <&i2c0_pins>; clocks = <&cmu_peri CLK_GOUT_I2C0_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -495,6 +512,7 @@ i2c_1: i2c@13840000 { pinctrl-0 = <&i2c1_pins>; clocks = <&cmu_peri CLK_GOUT_I2C1_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -508,6 +526,7 @@ i2c_2: i2c@13850000 { pinctrl-0 = <&i2c2_pins>; clocks = <&cmu_peri CLK_GOUT_I2C2_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -521,6 +540,7 @@ i2c_3: i2c@13860000 { pinctrl-0 = <&i2c3_pins>; clocks = <&cmu_peri CLK_GOUT_I2C3_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -534,6 +554,7 @@ i2c_4: i2c@13870000 { pinctrl-0 = <&i2c4_pins>; clocks = <&cmu_peri CLK_GOUT_I2C4_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -548,6 +569,7 @@ i2c_5: i2c@13880000 { pinctrl-0 = <&i2c5_pins>; clocks = <&cmu_peri CLK_GOUT_I2C5_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -562,6 +584,7 @@ i2c_6: i2c@13890000 { pinctrl-0 = <&i2c6_pins>; clocks = <&cmu_peri CLK_GOUT_I2C6_PCLK>; clock-names = "i2c"; + status = "disabled"; }; @@ -632,6 +655,7 @@ usbdrd: usb@13600000 { clock-names = "bus_early", "ref"; #address-cells = <1>; #size-cells = <1>; + status = "disabled"; usbdrd_dwc3: usb@0 { @@ -651,6 +675,7 @@ usbdrd_phy: phy@135d0000 { clock-names = "phy", "ref"; samsung,pmu-syscon = <&pmu_system_controller>; #phy-cells = <1>; + status = "disabled"; }; @@ -665,6 +690,7 @@ usi_uart: usi@138200c0 { clocks = <&cmu_peri CLK_GOUT_UART_PCLK>, <&cmu_peri CLK_GOUT_UART_IPCLK>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_0: serial@13820000 { @@ -676,6 +702,7 @@ serial_0: serial@13820000 { clocks = <&cmu_peri CLK_GOUT_UART_PCLK>, <&cmu_peri CLK_GOUT_UART_IPCLK>; clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; }; }; @@ -691,6 +718,7 @@ usi_hsi2c_0: usi@138a00c0 { clocks = <&cmu_peri CLK_GOUT_HSI2C0_PCLK>, <&cmu_peri CLK_GOUT_HSI2C0_IPCLK>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_0: i2c@138a0000 { @@ -705,6 +733,7 @@ hsi2c_0: i2c@138a0000 { clocks = <&cmu_peri CLK_GOUT_HSI2C0_IPCLK>, <&cmu_peri CLK_GOUT_HSI2C0_PCLK>; clock-names = "hsi2c", "hsi2c_pclk"; + status = "disabled"; }; }; @@ -720,6 +749,7 @@ usi_hsi2c_1: usi@138b00c0 { clocks = <&cmu_peri CLK_GOUT_HSI2C1_PCLK>, <&cmu_peri CLK_GOUT_HSI2C1_IPCLK>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_1: i2c@138b0000 { @@ -734,6 +764,7 @@ hsi2c_1: i2c@138b0000 { clocks = <&cmu_peri CLK_GOUT_HSI2C1_IPCLK>, <&cmu_peri CLK_GOUT_HSI2C1_PCLK>; clock-names = "hsi2c", "hsi2c_pclk"; + status = "disabled"; }; }; @@ -749,6 +780,7 @@ usi_hsi2c_2: usi@138c00c0 { clocks = <&cmu_peri CLK_GOUT_HSI2C2_PCLK>, <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_2: i2c@138c0000 { @@ -763,6 +795,7 @@ hsi2c_2: i2c@138c0000 { clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>, <&cmu_peri CLK_GOUT_HSI2C2_PCLK>; clock-names = "hsi2c", "hsi2c_pclk"; + status = "disabled"; }; }; @@ -778,6 +811,7 @@ usi_spi_0: usi@139400c0 { clocks = <&cmu_peri CLK_GOUT_SPI0_PCLK>, <&cmu_peri CLK_GOUT_SPI0_IPCLK>; clock-names = "pclk", "ipclk"; + status = "disabled"; spi_0: spi@13940000 { @@ -795,6 +829,7 @@ spi_0: spi@13940000 { samsung,spi-src-clk = <0>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -810,6 +845,7 @@ usi_cmgp0: usi@11d000c0 { clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI0_PCLK>, <&cmu_cmgp CLK_GOUT_CMGP_USI0_IPCLK>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_3: i2c@11d00000 { @@ -824,6 +860,7 @@ hsi2c_3: i2c@11d00000 { clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI0_IPCLK>, <&cmu_cmgp CLK_GOUT_CMGP_USI0_PCLK>; clock-names = "hsi2c", "hsi2c_pclk"; + status = "disabled"; }; @@ -836,6 +873,7 @@ serial_1: serial@11d00000 { clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI0_PCLK>, <&cmu_cmgp CLK_GOUT_CMGP_USI0_IPCLK>; clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; }; @@ -854,6 +892,7 @@ spi_1: spi@11d00000 { samsung,spi-src-clk = <0>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -869,6 +908,7 @@ usi_cmgp1: usi@11d200c0 { clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI1_PCLK>, <&cmu_cmgp CLK_GOUT_CMGP_USI1_IPCLK>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_4: i2c@11d20000 { @@ -883,6 +923,7 @@ hsi2c_4: i2c@11d20000 { clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI1_IPCLK>, <&cmu_cmgp CLK_GOUT_CMGP_USI1_PCLK>; clock-names = "hsi2c", "hsi2c_pclk"; + status = "disabled"; }; @@ -895,6 +936,7 @@ serial_2: serial@11d20000 { clocks = <&cmu_cmgp CLK_GOUT_CMGP_USI1_PCLK>, <&cmu_cmgp CLK_GOUT_CMGP_USI1_IPCLK>; clock-names = "uart", "clk_uart_baud0"; + status = "disabled"; }; @@ -913,6 +955,7 @@ spi_2: spi@11d20000 { samsung,spi-src-clk = <0>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/exynos/exynos8855-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/exynos8855-pinctrl.dtsi index b65f1698cd74..439d7d7e319b 100644 --- a/arch/arm64/boot/dts/exynos/exynos8855-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8855-pinctrl.dtsi @@ -462,7 +462,7 @@ gpm21: gpm21-gpio-bank { }; &pinctrl_hsi_ufs { - gpf3: gpf3-gpio-bank{ + gpf3: gpf3-gpio-bank { gpio-controller; #gpio-cells = <2>; diff --git a/arch/arm64/boot/dts/exynos/exynos8855.dtsi b/arch/arm64/boot/dts/exynos/exynos8855.dtsi index 9d82fceb5130..0333b80eba84 100644 --- a/arch/arm64/boot/dts/exynos/exynos8855.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8855.dtsi @@ -42,12 +42,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -57,9 +60,11 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts b/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts index 305dc72f93d8..da02b557a8f2 100644 --- a/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts +++ b/arch/arm64/boot/dts/exynos/exynos8895-dreamlte.dts @@ -192,5 +192,6 @@ ts_int: ts-int-pins { &usi9 { samsung,mode = ; + status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi index ff114cd6c9ea..a9a6f6970d71 100644 --- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -35,12 +35,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -50,12 +53,15 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; + core3 { cpu = <&cpu7>; }; @@ -207,8 +213,7 @@ gic: interrupt-controller@10201000 { <0x10206000 0x2000>; #interrupt-cells = <3>; interrupt-controller; - interrupts = ; + interrupts = ; #address-cells = <0>; #size-cells = <1>; }; @@ -244,6 +249,7 @@ serial_0: serial@10430000 { pinctrl-names = "default"; pinctrl-0 = <&uart0_bus>; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -256,6 +262,7 @@ usi0: usi@10440000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric0 0x1000>; + status = "disabled"; hsi2c_5: i2c@0 { @@ -283,6 +290,7 @@ serial_2: serial@0 { pinctrl-0 = <&uart2_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -298,6 +306,7 @@ spi_2: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -326,6 +335,7 @@ usi1: usi@10460000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric0 0x1004>; + status = "disabled"; hsi2c_7: i2c@0 { @@ -353,6 +363,7 @@ serial_3: serial@0 { pinctrl-0 = <&uart3_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -368,6 +379,7 @@ spi_3: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -396,6 +408,7 @@ usi2: usi@10480000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric0 0x1008>; + status = "disabled"; hsi2c_9: i2c@0 { @@ -423,6 +436,7 @@ serial_4: serial@0 { pinctrl-0 = <&uart4_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -438,6 +452,7 @@ spi_4: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -466,6 +481,7 @@ usi3: usi@104a0000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric0 0x100c>; + status = "disabled"; hsi2c_11: i2c@0 { @@ -493,6 +509,7 @@ serial_5: serial@0 { pinctrl-0 = <&uart5_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -508,6 +525,7 @@ spi_5: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -575,6 +593,7 @@ serial_1: serial@10830000 { pinctrl-names = "default"; pinctrl-0 = <&uart1_bus>; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -587,6 +606,7 @@ usi4: usi@10840000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x1008>; + status = "disabled"; hsi2c_13: i2c@0 { @@ -614,6 +634,7 @@ serial_6: serial@0 { pinctrl-0 = <&uart6_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -629,6 +650,7 @@ spi_6: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -657,6 +679,7 @@ usi5: usi@10860000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x100c>; + status = "disabled"; hsi2c_15: i2c@0 { @@ -684,6 +707,7 @@ serial_7: serial@0 { pinctrl-0 = <&uart7_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -699,6 +723,7 @@ spi_7: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -727,6 +752,7 @@ usi6: usi@10880000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x1010>; + status = "disabled"; hsi2c_17: i2c@0 { @@ -754,6 +780,7 @@ serial_8: serial@0 { pinctrl-0 = <&uart8_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -769,6 +796,7 @@ spi_8: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -797,6 +825,7 @@ usi7: usi@108a0000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x1014>; + status = "disabled"; hsi2c_19: i2c@0 { @@ -824,6 +853,7 @@ serial_9: serial@0 { pinctrl-0 = <&uart9_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -839,6 +869,7 @@ spi_9: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -867,6 +898,7 @@ usi8: usi@108c0000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x1018>; + status = "disabled"; hsi2c_21: i2c@0 { @@ -894,6 +926,7 @@ serial_10: serial@0 { pinctrl-0 = <&uart10_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -909,6 +942,7 @@ spi_10: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -937,6 +971,7 @@ usi9: usi@108e0000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x101c>; + status = "disabled"; hsi2c_23: i2c@0 { @@ -964,6 +999,7 @@ serial_11: serial@0 { pinctrl-0 = <&uart11_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -979,6 +1015,7 @@ spi_11: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -1007,6 +1044,7 @@ usi10: usi@10900000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x1020>; + status = "disabled"; hsi2c_25: i2c@0 { @@ -1034,6 +1072,7 @@ serial_12: serial@0 { pinctrl-0 = <&uart12_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1049,6 +1088,7 @@ spi_12: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -1077,6 +1117,7 @@ usi11: usi@10920000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x1024>; + status = "disabled"; hsi2c_27: i2c@0 { @@ -1104,6 +1145,7 @@ serial_13: serial@0 { pinctrl-0 = <&uart13_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1119,6 +1161,7 @@ spi_13: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -1147,6 +1190,7 @@ usi12: usi@10940000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x1028>; + status = "disabled"; hsi2c_29: i2c@0 { @@ -1174,6 +1218,7 @@ serial_14: serial@0 { pinctrl-0 = <&uart14_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1189,6 +1234,7 @@ spi_14: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -1217,6 +1263,7 @@ usi13: usi@10960000 { #address-cells = <1>; #size-cells = <1>; samsung,sysreg = <&syscon_peric1 0x102c>; + status = "disabled"; hsi2c_31: i2c@0 { @@ -1244,6 +1291,7 @@ serial_15: serial@0 { pinctrl-0 = <&uart15_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1259,6 +1307,7 @@ spi_15: spi@0 { pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; @@ -1356,6 +1405,7 @@ spi_0: spi@109d0000 { interrupts = ; pinctrl-0 = <&spi0_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1371,6 +1421,7 @@ spi_1: spi@109e0000 { interrupts = ; pinctrl-0 = <&spi1_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1437,6 +1488,7 @@ mmc: mmc@11500000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/exynos/exynos9810.dtsi b/arch/arm64/boot/dts/exynos/exynos9810.dtsi index 01eba31f7ca3..4f1f1e9a41b2 100644 --- a/arch/arm64/boot/dts/exynos/exynos9810.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos9810.dtsi @@ -36,12 +36,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -51,12 +54,15 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; + core3 { cpu = <&cpu7>; }; @@ -179,8 +185,7 @@ gic: interrupt-controller@10101000 { <0x10106000 0x2000>; #interrupt-cells = <3>; interrupt-controller; - interrupts = ; + interrupts = ; #address-cells = <0>; #size-cells = <1>; }; diff --git a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts b/arch/arm64/boot/dts/exynos/exynos990-c1s.dts index 9f0ad4f9673a..a58923229128 100644 --- a/arch/arm64/boot/dts/exynos/exynos990-c1s.dts +++ b/arch/arm64/boot/dts/exynos/exynos990-c1s.dts @@ -121,9 +121,10 @@ key_volup: key-volup-pins { }; &usbdrd { - status = "okay"; vdd10-supply = <®_dummy>; vdd33-supply = <®_dummy>; + + status = "okay"; }; &usbdrd_phy { diff --git a/arch/arm64/boot/dts/exynos/exynos990-r8s.dts b/arch/arm64/boot/dts/exynos/exynos990-r8s.dts index 55342db61979..563dbde6abc7 100644 --- a/arch/arm64/boot/dts/exynos/exynos990-r8s.dts +++ b/arch/arm64/boot/dts/exynos/exynos990-r8s.dts @@ -121,9 +121,10 @@ key_volup: key-volup-pins { }; &usbdrd { - status = "okay"; vdd10-supply = <®_dummy>; vdd33-supply = <®_dummy>; + + status = "okay"; }; &usbdrd_phy { diff --git a/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi b/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi index 7b97220cccb7..01ecdf484dab 100644 --- a/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi @@ -104,9 +104,10 @@ key_volup: key-volup-pins { }; &usbdrd { - status = "okay"; vdd10-supply = <®_dummy>; vdd33-supply = <®_dummy>; + + status = "okay"; }; &usbdrd_phy { diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi index 2e6fb24a3c92..8115d581b173 100644 --- a/arch/arm64/boot/dts/exynos/exynos990.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi @@ -243,8 +243,7 @@ gic: interrupt-controller@10101000 { <0x10106000 0x2000>; #interrupt-cells = <3>; interrupt-controller; - interrupts = ; + interrupts = ; #address-cells = <0>; #size-cells = <1>; }; @@ -320,6 +319,7 @@ usbdrd_phy: phy@10c00000 { clock-names = "phy", "ref"; samsung,pmu-syscon = <&pmu_system_controller>; #phy-cells = <1>; + status = "disabled"; }; @@ -332,6 +332,7 @@ usbdrd: usb@10e00000 { clock-names = "bus_early", "ref"; #address-cells = <1>; #size-cells = <1>; + status = "disabled"; usbdrd_dwc3: usb@0 { diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts index de2c1de51a76..9912432c5961 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -103,11 +103,13 @@ key_volup: key-volup-pins { &pwm { pinctrl-names = "default"; pinctrl-0 = <&pwm_tout3>; + status = "okay"; }; &serial_0 { pinctrl-0 = <&uart0_bus_dual>; + status = "okay"; }; @@ -120,17 +122,20 @@ &ufs_1_phy { }; &ufs_0 { - status = "okay"; vcc-supply = <&ufs_0_fixed_vcc_reg>; + + status = "okay"; }; &ufs_1 { - status = "okay"; vcc-supply = <&ufs_1_fixed_vcc_reg>; + + status = "okay"; }; &usi_0 { samsung,clkreq-on; /* needed for UART mode */ + status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi index 2c34a2b30ad0..9c140ca261a2 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -51,12 +51,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -66,12 +69,15 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; + core3 { cpu = <&cpu7>; }; @@ -338,8 +344,7 @@ gic: interrupt-controller@10101000 { <0x10102000 0x2000>, <0x10104000 0x2000>, <0x10106000 0x2000>; - interrupts = ; + interrupts = ; }; pdma0: dma-controller@1b2e0000 { @@ -450,6 +455,7 @@ usi_0: usi@103000c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_0>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_0: serial@10300000 { @@ -463,6 +469,7 @@ serial_0: serial@10300000 { <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_0>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -483,6 +490,7 @@ spi_0: spi@10300000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <256>; + status = "disabled"; }; @@ -497,6 +505,7 @@ hsi2c_0: i2c@10300000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -513,6 +522,7 @@ usi_i2c_0: usi@103100c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_1>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_1>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_1: i2c@10310000 { @@ -526,6 +536,7 @@ hsi2c_1: i2c@10310000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -542,6 +553,7 @@ usi_1: usi@103200c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_2>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_1: serial@10320000 { @@ -555,6 +567,7 @@ serial_1: serial@10320000 { <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_2>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -575,6 +588,7 @@ spi_1: spi@10320000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <256>; + status = "disabled"; }; @@ -589,6 +603,7 @@ hsi2c_2: i2c@10320000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -605,6 +620,7 @@ usi_i2c_1: usi@103300c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_3>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_3>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_3: i2c@10330000 { @@ -618,6 +634,7 @@ hsi2c_3: i2c@10330000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -634,6 +651,7 @@ usi_2: usi@103400c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_4>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_2: serial@10340000 { @@ -647,6 +665,7 @@ serial_2: serial@10340000 { <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_4>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -667,6 +686,7 @@ spi_2: spi@10340000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -681,6 +701,7 @@ hsi2c_4: i2c@10340000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -697,6 +718,7 @@ usi_i2c_2: usi@103500c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_5>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_5>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_5: i2c@10350000 { @@ -710,6 +732,7 @@ hsi2c_5: i2c@10350000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -726,6 +749,7 @@ usi_3: usi@103600c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_6>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_3: serial@10360000 { @@ -739,6 +763,7 @@ serial_3: serial@10360000 { <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_6>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -759,6 +784,7 @@ spi_3: spi@10360000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -773,6 +799,7 @@ hsi2c_6: i2c@10360000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -789,6 +816,7 @@ usi_i2c_3: usi@103700c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_7>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_7>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_7: i2c@10370000 { @@ -802,6 +830,7 @@ hsi2c_7: i2c@10370000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -818,6 +847,7 @@ usi_4: usi@103800c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_8>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_4: serial@10380000 { @@ -831,6 +861,7 @@ serial_4: serial@10380000 { <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_8>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -851,6 +882,7 @@ spi_4: spi@10380000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -865,6 +897,7 @@ hsi2c_8: i2c@10380000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -881,6 +914,7 @@ usi_i2c_4: usi@103900c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_9>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_9>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_9: i2c@10390000 { @@ -894,6 +928,7 @@ hsi2c_9: i2c@10390000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -910,6 +945,7 @@ usi_5: usi@103a00c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_10>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_5: serial@103a0000 { @@ -923,6 +959,7 @@ serial_5: serial@103a0000 { <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_10>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -943,6 +980,7 @@ spi_5: spi@103a0000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -957,6 +995,7 @@ hsi2c_10: i2c@103a0000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -973,6 +1012,7 @@ usi_i2c_5: usi@103b00c0 { clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PCLK_11>, <&cmu_peric0 CLK_GOUT_PERIC0_IPCLK_11>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_11: i2c@103b0000 { @@ -986,6 +1026,7 @@ hsi2c_11: i2c@103b0000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1002,6 +1043,7 @@ usi_6: usi@109000c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_0>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_6: serial@10900000 { @@ -1015,6 +1057,7 @@ serial_6: serial@10900000 { <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_0>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -1035,6 +1078,7 @@ spi_6: spi@10900000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <256>; + status = "disabled"; }; @@ -1049,6 +1093,7 @@ hsi2c_12: i2c@10900000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1065,6 +1110,7 @@ usi_i2c_6: usi@109100c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_1>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_1>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_13: i2c@10910000 { @@ -1078,6 +1124,7 @@ hsi2c_13: i2c@10910000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1094,6 +1141,7 @@ usi_7: usi@109200c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_2>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_7: serial@10920000 { @@ -1107,6 +1155,7 @@ serial_7: serial@10920000 { <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_2>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1127,6 +1176,7 @@ spi_7: spi@10920000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -1141,6 +1191,7 @@ hsi2c_14: i2c@10920000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1157,6 +1208,7 @@ usi_i2c_7: usi@109300c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_3>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_3>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_15: i2c@10930000 { @@ -1170,6 +1222,7 @@ hsi2c_15: i2c@10930000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1186,6 +1239,7 @@ usi_8: usi@109400c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_4>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_8: serial@10940000 { @@ -1199,6 +1253,7 @@ serial_8: serial@10940000 { <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_4>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1219,6 +1274,7 @@ spi_8: spi@10940000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -1233,6 +1289,7 @@ hsi2c_16: i2c@10940000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1249,6 +1306,7 @@ usi_i2c_8: usi@109500c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_5>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_5>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_17: i2c@10950000 { @@ -1262,6 +1320,7 @@ hsi2c_17: i2c@10950000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1278,6 +1337,7 @@ usi_9: usi@109600c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_6>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_9: serial@10960000 { @@ -1291,6 +1351,7 @@ serial_9: serial@10960000 { <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_6>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1311,6 +1372,7 @@ spi_9: spi@10960000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -1325,6 +1387,7 @@ hsi2c_18: i2c@10960000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1341,6 +1404,7 @@ usi_i2c_9: usi@109700c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_7>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_7>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_19: i2c@10970000 { @@ -1354,6 +1418,7 @@ hsi2c_19: i2c@10970000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1370,6 +1435,7 @@ usi_10: usi@109800c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_8>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_10: serial@10980000 { @@ -1383,6 +1449,7 @@ serial_10: serial@10980000 { <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_8>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1403,6 +1470,7 @@ spi_10: spi@10980000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -1417,6 +1485,7 @@ hsi2c_20: i2c@10980000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1433,6 +1502,7 @@ usi_i2c_10: usi@109900c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_9>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_9>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_21: i2c@10990000 { @@ -1446,6 +1516,7 @@ hsi2c_21: i2c@10990000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1462,6 +1533,7 @@ usi_11: usi@109a00c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_10>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_11: serial@109a0000 { @@ -1475,6 +1547,7 @@ serial_11: serial@109a0000 { <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_10>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1493,6 +1566,7 @@ spi_11: spi@109a0000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -1507,6 +1581,7 @@ hsi2c_22: i2c@109a0000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1523,6 +1598,7 @@ usi_i2c_11: usi@109b00c0 { clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PCLK_11>, <&cmu_peric1 CLK_GOUT_PERIC1_IPCLK_11>; clock-names = "pclk", "ipclk"; + status = "disabled"; hsi2c_23: i2c@109b0000 { @@ -1536,6 +1612,7 @@ hsi2c_23: i2c@109b0000 { clock-names = "hsi2c", "hsi2c_pclk"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; @@ -1548,6 +1625,7 @@ ufs_0_phy: phy@17e04000 { #phy-cells = <0>; clocks = <&xtcxo>; clock-names = "ref_clk"; + status = "disabled"; }; @@ -1569,6 +1647,7 @@ ufs_0: ufs@17e00000 { phys = <&ufs_0_phy>; phy-names = "ufs-phy"; samsung,sysreg = <&syscon_fsys2 0x710>; + status = "disabled"; }; @@ -1580,6 +1659,7 @@ ufs_1_phy: phy@17f04000 { #phy-cells = <0>; clocks = <&xtcxo>; clock-names = "ref_clk"; + status = "disabled"; }; @@ -1601,6 +1681,7 @@ ufs_1: ufs@17f00000 { phys = <&ufs_1_phy>; phy-names = "ufs-phy"; samsung,sysreg = <&syscon_fsys2 0x714>; + status = "disabled"; }; @@ -1632,6 +1713,7 @@ pwm: pwm@103f0000 { #pwm-cells = <3>; clocks = <&xtcxo>; clock-names = "timers"; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts b/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts index 5873720c213e..a92e5751bf9b 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts +++ b/arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts @@ -71,6 +71,7 @@ key_back: key-back-pins { &pwm { pinctrl-names = "default"; pinctrl-0 = <&pwm_tout0>; + status = "okay"; }; @@ -80,6 +81,7 @@ &serial_0 { &usi_0 { samsung,clkreq-on; /* needed for UART mode */ + status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index e2f962dc1b3d..399b56b4dbdd 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -48,12 +48,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -63,12 +66,15 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; + core2 { cpu = <&cpu6>; }; + core3 { cpu = <&cpu7>; }; @@ -78,6 +84,7 @@ cluster2 { core0 { cpu = <&cpu8>; }; + core1 { cpu = <&cpu9>; }; @@ -440,6 +447,7 @@ usi_0: usi@108800c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_0: serial@10880000 { @@ -453,6 +461,7 @@ serial_0: serial@10880000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI00_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -473,6 +482,7 @@ spi_0: spi@10880000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <256>; + status = "disabled"; }; }; @@ -489,6 +499,7 @@ usi_1: usi@108a00c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_1: serial@108a0000 { @@ -502,6 +513,7 @@ serial_1: serial@108a0000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI01_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -522,6 +534,7 @@ spi_1: spi@108a0000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <256>; + status = "disabled"; }; }; @@ -538,6 +551,7 @@ usi_2: usi@108c00c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_2: serial@108c0000 { @@ -551,6 +565,7 @@ serial_2: serial@108c0000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI02_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -571,6 +586,7 @@ spi_2: spi@108c0000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -587,6 +603,7 @@ usi_3: usi@108e00c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_3: serial@108e0000 { @@ -600,6 +617,7 @@ serial_3: serial@108e0000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI03_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -620,6 +638,7 @@ spi_3: spi@108e0000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -636,6 +655,7 @@ usi_4: usi@109000c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_4: serial@10900000 { @@ -649,6 +669,7 @@ serial_4: serial@10900000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI04_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -669,6 +690,7 @@ spi_4: spi@10900000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -685,6 +707,7 @@ usi_5: usi@109200c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_5: serial@10920000 { @@ -698,6 +721,7 @@ serial_5: serial@10920000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI05_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -718,6 +742,7 @@ spi_5: spi@10920000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -734,6 +759,7 @@ usi_6: usi@109400c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI06_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_6: serial@10940000 { @@ -747,6 +773,7 @@ serial_6: serial@10940000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI06_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -767,6 +794,7 @@ spi_6: spi@10940000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -783,6 +811,7 @@ usi_7: usi@109600c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI07_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_7: serial@10960000 { @@ -796,6 +825,7 @@ serial_7: serial@10960000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI07_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -816,6 +846,7 @@ spi_7: spi@10960000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -832,6 +863,7 @@ usi_8: usi@109800c0 { clocks = <&cmu_peric0 CLK_MOUT_PERIC0_NOC_USER>, <&cmu_peric0 CLK_DOUT_PERIC0_USI08_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_8: serial@10980000 { @@ -845,6 +877,7 @@ serial_8: serial@10980000 { <&cmu_peric0 CLK_DOUT_PERIC0_USI08_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -865,6 +898,7 @@ spi_8: spi@10980000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; @@ -878,6 +912,7 @@ pwm: pwm@109b0000 { #pwm-cells = <3>; clocks = <&xtcxo>; clock-names = "timers"; + status = "disabled"; }; @@ -918,6 +953,7 @@ usi_9: usi@10c800c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_9: serial@10c8000 { @@ -931,6 +967,7 @@ serial_9: serial@10c8000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI09_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <256>; + status = "disabled"; }; @@ -951,6 +988,7 @@ spi_9: spi@10c80000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <256>; + status = "disabled"; }; }; @@ -967,6 +1005,7 @@ usi_10: usi@10ca00c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_10: serial@10ca0000 { @@ -980,6 +1019,7 @@ serial_10: serial@10ca0000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI10_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1000,6 +1040,7 @@ spi_10: spi@10ca0000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -1016,6 +1057,7 @@ usi_11: usi@10cc00c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_11: serial@10cc0000 { @@ -1029,6 +1071,7 @@ serial_11: serial@10cc0000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI11_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1049,6 +1092,7 @@ spi_11: spi@10cc0000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -1065,6 +1109,7 @@ usi_12: usi@10ce00c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI12_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_12: serial@10ce0000 { @@ -1078,6 +1123,7 @@ serial_12: serial@10ce0000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI12_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1098,6 +1144,7 @@ spi_12: spi@10ce0000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -1114,6 +1161,7 @@ usi_13: usi@10d000c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI13_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_13: serial@10d00000 { @@ -1127,6 +1175,7 @@ serial_13: serial@10d00000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI13_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1147,6 +1196,7 @@ spi_13: spi@10d00000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -1163,6 +1213,7 @@ usi_14: usi@10d200c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI14_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_14: serial@10d20000 { @@ -1176,6 +1227,7 @@ serial_14: serial@10d20000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI14_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1196,6 +1248,7 @@ spi_14: spi@10d20000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -1212,6 +1265,7 @@ usi_15: usi@10d400c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI15_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_15: serial@10d40000 { @@ -1225,6 +1279,7 @@ serial_15: serial@10d40000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI15_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1245,6 +1300,7 @@ spi_15: spi@10d40000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -1261,6 +1317,7 @@ usi_16: usi@10d600c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI16_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_16: serial@10d60000 { @@ -1274,6 +1331,7 @@ serial_16: serial@10d60000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI16_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1294,6 +1352,7 @@ spi_16: spi@10d60000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -1310,6 +1369,7 @@ usi_17: usi@10d800c0 { clocks = <&cmu_peric1 CLK_MOUT_PERIC1_NOC_USER>, <&cmu_peric1 CLK_DOUT_PERIC1_USI17_USI>; clock-names = "pclk", "ipclk"; + status = "disabled"; serial_17: serial@10d80000 { @@ -1323,6 +1383,7 @@ serial_17: serial@10d80000 { <&cmu_peric1 CLK_DOUT_PERIC1_USI17_USI>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1343,6 +1404,7 @@ spi_17: spi@10d80000 { #address-cells = <1>; #size-cells = <0>; fifo-depth = <64>; + status = "disabled"; }; }; @@ -1468,6 +1530,7 @@ ufs_0: ufs@16e00000 { phy-names = "ufs-phy"; samsung,sysreg = <&syscon_hsi2 0x710>; dma-coherent; + status = "disabled"; }; @@ -1479,6 +1542,7 @@ ufs_0_phy: phy@16e04000 { clock-names = "ref_clk"; samsung,pmu-syscon = <&pmu_system_controller>; #phy-cells = <0>; + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts index 36721adcaa23..c5a3958c2320 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts @@ -39,6 +39,7 @@ ldo31m { &cont_splash_mem { reg = <0x0 0xfac00000 (1080 * 2400 * 4)>; + status = "okay"; }; @@ -47,5 +48,6 @@ &framebuffer0 { height = <2400>; stride = <(1080 * 4)>; format = "a8r8g8b8"; + status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi b/arch/arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi index a675f822acec..646722da4e8c 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101-pinctrl.dtsi @@ -77,7 +77,7 @@ gpa4: gpa4-gpio-bank { ; }; - gpa5: gpa5-gpio-bank { + gpa5: gpa5-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -91,7 +91,7 @@ gpa5: gpa5-gpio-bank { ; }; - gpa9: gpa9-gpio-bank { + gpa9: gpa9-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -106,7 +106,7 @@ gpa9: gpa9-gpio-bank { ; }; - gpa10: gpa10-gpio-bank { + gpa10: gpa10-gpio-bank { gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -1030,7 +1030,7 @@ gpp27: gpp27-gpio-bank { #interrupt-cells = <2>; }; - hsi2c13_bus: hsi2c13-bus-pins { + hsi2c13_bus: hsi2c13-bus-pins { samsung,pins = "gpp25-0", "gpp25-1"; samsung,pin-function = ; samsung,pin-pud = ; diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi index 5227cd4e314b..a12f2b88d72d 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi @@ -32,6 +32,7 @@ framebuffer0: framebuffer-0 { vci-supply = <&s2mpg10_ldo22m>; vddi-supply = <&s2mpg11_bucka>; /* format properties to be added by actual board */ + status = "disabled"; }; }; @@ -98,6 +99,7 @@ cont_splash_mem: splash@fac00000 { /* size to be updated by actual board */ reg = <0x0 0xfac00000 0x0>; no-map; + status = "disabled"; }; }; @@ -856,8 +858,9 @@ &serial_0 { }; &ufs_0 { - status = "okay"; vcc-supply = <&ufs_0_fixed_vcc_reg>; + + status = "okay"; }; &ufs_0_phy { @@ -867,6 +870,7 @@ &ufs_0_phy { &usbdrd31 { vdd10-supply = <®_placeholder>; vdd33-supply = <®_placeholder>; + status = "okay"; }; @@ -875,6 +879,7 @@ &usbdrd31_dwc3 { usb-role-switch; role-switch-default-mode = "peripheral"; maximum-speed = "super-speed-plus"; + status = "okay"; port { @@ -893,6 +898,7 @@ &usbdrd31_phy { vdd33-usb20-supply = <®_placeholder>; vdda-usbdp-supply = <®_placeholder>; vddh-usbdp-supply = <®_placeholder>; + status = "okay"; port { @@ -904,20 +910,24 @@ usbdrd31_phy_orien_switch: endpoint { &usi_uart { samsung,clkreq-on; /* needed for UART mode */ + status = "okay"; }; &usi8 { samsung,mode = ; + status = "okay"; }; &usi12 { samsung,mode = ; + status = "okay"; }; &watchdog_cl0 { timeout-sec = <30>; + status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/google/gs101-raven.dts b/arch/arm64/boot/dts/exynos/google/gs101-raven.dts index a422542715f2..7c4273796a22 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-raven.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-raven.dts @@ -35,6 +35,7 @@ ldo14s { &cont_splash_mem { reg = <0x0 0xfac00000 (1440 * 3120 * 4)>; + status = "okay"; }; @@ -43,5 +44,6 @@ &framebuffer0 { height = <3120>; stride = <(1440 * 4)>; format = "a8r8g8b8"; + status = "okay"; }; diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index 86933f22647b..bfceea5486f4 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -39,12 +39,15 @@ cluster0 { core0 { cpu = <&cpu0>; }; + core1 { cpu = <&cpu1>; }; + core2 { cpu = <&cpu2>; }; + core3 { cpu = <&cpu3>; }; @@ -54,6 +57,7 @@ cluster1 { core0 { cpu = <&cpu4>; }; + core1 { cpu = <&cpu5>; }; @@ -63,6 +67,7 @@ cluster2 { core0 { cpu = <&cpu6>; }; + core1 { cpu = <&cpu7>; }; @@ -624,6 +629,7 @@ watchdog_cl0: watchdog@10060000 { interrupts = ; samsung,syscon-phandle = <&pmu_system_controller>; samsung,cluster-index = <0>; + status = "disabled"; }; @@ -636,6 +642,7 @@ watchdog_cl1: watchdog@10070000 { interrupts = ; samsung,syscon-phandle = <&pmu_system_controller>; samsung,cluster-index = <1>; + status = "disabled"; }; @@ -707,6 +714,7 @@ usi1: usi@109000c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_0>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1000>; + status = "disabled"; hsi2c_1: i2c@10900000 { @@ -721,6 +729,7 @@ hsi2c_1: i2c@10900000 { interrupts = ; pinctrl-0 = <&hsi2c1_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -734,6 +743,7 @@ serial_1: serial@10900000 { pinctrl-0 = <&uart1_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -748,6 +758,7 @@ spi_1: spi@10900000 { interrupts = ; pinctrl-0 = <&spi1_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -762,6 +773,7 @@ usi2: usi@109100c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_1>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1004>; + status = "disabled"; hsi2c_2: i2c@10910000 { @@ -776,6 +788,7 @@ hsi2c_2: i2c@10910000 { interrupts = ; pinctrl-0 = <&hsi2c2_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -789,6 +802,7 @@ serial_2: serial@10910000 { pinctrl-0 = <&uart2_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -803,6 +817,7 @@ spi_2: spi@10910000 { interrupts = ; pinctrl-0 = <&spi2_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -817,6 +832,7 @@ usi3: usi@109200c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_2>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1008>; + status = "disabled"; hsi2c_3: i2c@10920000 { @@ -831,6 +847,7 @@ hsi2c_3: i2c@10920000 { interrupts = ; pinctrl-0 = <&hsi2c3_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -844,6 +861,7 @@ serial_3: serial@10920000 { pinctrl-0 = <&uart3_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -858,6 +876,7 @@ spi_3: spi@10920000 { interrupts = ; pinctrl-0 = <&spi3_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -872,6 +891,7 @@ usi4: usi@109300c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_3>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x100c>; + status = "disabled"; hsi2c_4: i2c@10930000 { @@ -886,6 +906,7 @@ hsi2c_4: i2c@10930000 { interrupts = ; pinctrl-0 = <&hsi2c4_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -899,6 +920,7 @@ serial_4: serial@10930000 { pinctrl-0 = <&uart4_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -913,6 +935,7 @@ spi_4: spi@10930000 { interrupts = ; pinctrl-0 = <&spi4_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -927,6 +950,7 @@ usi5: usi@109400c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_4>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1010>; + status = "disabled"; hsi2c_5: i2c@10940000 { @@ -941,6 +965,7 @@ hsi2c_5: i2c@10940000 { interrupts = ; pinctrl-0 = <&hsi2c5_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -954,6 +979,7 @@ serial_5: serial@10940000 { pinctrl-0 = <&uart5_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -968,6 +994,7 @@ spi_5: spi@10940000 { interrupts = ; pinctrl-0 = <&spi5_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -982,6 +1009,7 @@ usi6: usi@109500c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_5>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1014>; + status = "disabled"; hsi2c_6: i2c@10950000 { @@ -996,6 +1024,7 @@ hsi2c_6: i2c@10950000 { interrupts = ; pinctrl-0 = <&hsi2c6_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1009,6 +1038,7 @@ serial_6: serial@10950000 { pinctrl-0 = <&uart6_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1023,6 +1053,7 @@ spi_6: spi@10950000 { interrupts = ; pinctrl-0 = <&spi6_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1037,6 +1068,7 @@ usi7: usi@109600c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_6>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1018>; + status = "disabled"; hsi2c_7: i2c@10960000 { @@ -1051,6 +1083,7 @@ hsi2c_7: i2c@10960000 { interrupts = ; pinctrl-0 = <&hsi2c7_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1064,6 +1097,7 @@ serial_7: serial@10960000 { pinctrl-0 = <&uart7_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1078,6 +1112,7 @@ spi_7: spi@10960000 { interrupts = ; pinctrl-0 = <&spi7_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1092,6 +1127,7 @@ usi8: usi@109700c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x101c>; + status = "disabled"; hsi2c_8: i2c@10970000 { @@ -1106,6 +1142,7 @@ hsi2c_8: i2c@10970000 { interrupts = ; pinctrl-0 = <&hsi2c8_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1119,6 +1156,7 @@ serial_8: serial@10970000 { pinctrl-0 = <&uart8_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1133,6 +1171,7 @@ spi_8: spi@10970000 { interrupts = ; pinctrl-0 = <&spi8_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1148,6 +1187,7 @@ usi_uart: usi@10a000c0 { clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1020>; samsung,mode = ; + status = "disabled"; serial_0: serial@10a00000 { @@ -1160,6 +1200,7 @@ serial_0: serial@10a00000 { pinctrl-0 = <&uart0_bus>; pinctrl-names = "default"; samsung,uart-fifosize = <256>; + status = "disabled"; }; }; @@ -1174,6 +1215,7 @@ usi14: usi@10a200c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_2>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x1028>; + status = "disabled"; hsi2c_14: i2c@10a20000 { @@ -1188,6 +1230,7 @@ hsi2c_14: i2c@10a20000 { interrupts = ; pinctrl-0 = <&hsi2c14_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1201,6 +1244,7 @@ serial_14: serial@10a20000 { pinctrl-0 = <&uart14_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1215,6 +1259,7 @@ spi_14: spi@10a20000 { interrupts = ; pinctrl-0 = <&spi14_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1254,6 +1299,7 @@ usi0: usi@10d100c0 { <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_1>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric1 0x1000>; + status = "disabled"; hsi2c_0: i2c@10d10000 { @@ -1268,6 +1314,7 @@ hsi2c_0: i2c@10d10000 { interrupts = ; pinctrl-0 = <&hsi2c0_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1281,6 +1328,7 @@ serial_usi0: serial@10d10000 { pinctrl-0 = <&uart0_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1295,6 +1343,7 @@ spi_0: spi@10d10000 { interrupts = ; pinctrl-0 = <&spi0_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1309,6 +1358,7 @@ usi9: usi@10d200c0 { <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_2>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric1 0x1004>; + status = "disabled"; hsi2c_9: i2c@10d20000 { @@ -1323,6 +1373,7 @@ hsi2c_9: i2c@10d20000 { interrupts = ; pinctrl-0 = <&hsi2c9_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1336,6 +1387,7 @@ serial_9: serial@10d20000 { pinctrl-0 = <&uart9_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1350,6 +1402,7 @@ spi_9: spi@10d20000 { interrupts = ; pinctrl-0 = <&spi9_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1364,6 +1417,7 @@ usi10: usi@10d300c0 { <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_3>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric1 0x1008>; + status = "disabled"; hsi2c_10: i2c@10d30000 { @@ -1378,6 +1432,7 @@ hsi2c_10: i2c@10d30000 { interrupts = ; pinctrl-0 = <&hsi2c10_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1391,6 +1446,7 @@ serial_10: serial@10d30000 { pinctrl-0 = <&uart10_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1405,6 +1461,7 @@ spi_10: spi@10d30000 { interrupts = ; pinctrl-0 = <&spi10_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1419,6 +1476,7 @@ usi11: usi@10d400c0 { <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_4>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric1 0x100c>; + status = "disabled"; hsi2c_11: i2c@10d40000 { @@ -1433,6 +1491,7 @@ hsi2c_11: i2c@10d40000 { interrupts = ; pinctrl-0 = <&hsi2c11_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1446,6 +1505,7 @@ serial_11: serial@10d40000 { pinctrl-0 = <&uart11_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1460,6 +1520,7 @@ spi_11: spi@10d40000 { interrupts = ; pinctrl-0 = <&spi11_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1474,6 +1535,7 @@ usi12: usi@10d500c0 { <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric1 0x1010>; + status = "disabled"; hsi2c_12: i2c@10d50000 { @@ -1488,6 +1550,7 @@ hsi2c_12: i2c@10d50000 { interrupts = ; pinctrl-0 = <&hsi2c12_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1501,6 +1564,7 @@ serial_12: serial@10d50000 { pinctrl-0 = <&uart12_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1515,6 +1579,7 @@ spi_12: spi@10d50000 { interrupts = ; pinctrl-0 = <&spi12_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1529,6 +1594,7 @@ usi13: usi@10d600c0 { <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_6>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric1 0x1014>; + status = "disabled"; hsi2c_13: i2c@10d60000 { @@ -1543,6 +1609,7 @@ hsi2c_13: i2c@10d60000 { interrupts = ; pinctrl-0 = <&hsi2c13_bus>; pinctrl-names = "default"; + status = "disabled"; }; @@ -1556,6 +1623,7 @@ serial_13: serial@10d60000 { pinctrl-0 = <&uart13_bus_single>; pinctrl-names = "default"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -1570,6 +1638,7 @@ spi_13: spi@10d60000 { interrupts = ; pinctrl-0 = <&spi13_bus>; pinctrl-names = "default"; + status = "disabled"; }; }; @@ -1609,6 +1678,7 @@ usbdrd31_phy: phy@11100000 { clock-names = "phy", "ref", "ctrl_aclk", "ctrl_pclk", "scl_pclk"; #phy-cells = <1>; samsung,pmu-syscon = <&pmu_system_controller>; + status = "disabled"; }; @@ -1616,12 +1686,13 @@ usbdrd31: usb@11110000 { compatible = "google,gs101-dwusb3"; ranges = <0x0 0x11110000 0x10000>; clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY>, - <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_SUSPEND_CLK_26>, - <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_ACLK>, - <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_PCLK>; + <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_SUSPEND_CLK_26>, + <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_ACLK>, + <&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_PCLK>; clock-names = "bus_early", "susp_clk", "link_aclk", "link_pclk"; #address-cells = <1>; #size-cells = <1>; + status = "disabled"; usbdrd31_dwc3: usb@0 { @@ -1635,6 +1706,7 @@ usbdrd31_dwc3: usb@0 { snps,has-lpm-erratum; snps,dis_u2_susphy_quirk; snps,dis_u3_susphy_quirk; + status = "disabled"; }; }; @@ -1698,6 +1770,7 @@ ufs_0: ufs@14700000 { phys = <&ufs_0_phy>; phy-names = "ufs-phy"; samsung,sysreg = <&sysreg_hsi2 0x710>; + status = "disabled"; }; @@ -1709,6 +1782,7 @@ ufs_0_phy: phy@14704000 { #phy-cells = <0>; clocks = <&ext_24_5m>; clock-names = "ref_clk"; + status = "disabled"; }; @@ -1812,6 +1886,7 @@ pinctrl_gsacore: pinctrl@17a80000 { /* TODO: update once support for this CMU exists */ clocks = <0>; clock-names = "pclk"; + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/tesla/fsd-evb.dts b/arch/arm64/boot/dts/tesla/fsd-evb.dts index 9ff22e1c8723..503abe52a81c 100644 --- a/arch/arm64/boot/dts/tesla/fsd-evb.dts +++ b/arch/arm64/boot/dts/tesla/fsd-evb.dts @@ -53,9 +53,11 @@ simple-audio-card,dai-link@0 { cpu-0 { sound-dai = <&i2s_0 0>; }; + cpu-1 { sound-dai = <&i2s_0 1>; }; + codec { sound-dai = <&tlv320aic3x>; system-clock-frequency = <33000000>; @@ -65,9 +67,10 @@ codec { }; ðernet0 { + phy-mode = "rgmii-id"; + status = "okay"; - phy-mode = "rgmii-id"; fixed-link { speed = <1000>; full-duplex; @@ -75,9 +78,10 @@ fixed-link { }; ðernet1 { + phy-mode = "rgmii-id"; + status = "okay"; - phy-mode = "rgmii-id"; fixed-link { speed = <1000>; full-duplex; diff --git a/arch/arm64/boot/dts/tesla/fsd.dtsi b/arch/arm64/boot/dts/tesla/fsd.dtsi index 5b06e2667b89..6766c78243a3 100644 --- a/arch/arm64/boot/dts/tesla/fsd.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd.dtsi @@ -43,12 +43,15 @@ cluster0 { core0 { cpu = <&cpucl0_0>; }; + core1 { cpu = <&cpucl0_1>; }; + core2 { cpu = <&cpucl0_2>; }; + core3 { cpu = <&cpucl0_3>; }; @@ -58,12 +61,15 @@ cluster1 { core0 { cpu = <&cpucl1_0>; }; + core1 { cpu = <&cpucl1_1>; }; + core2 { cpu = <&cpucl1_2>; }; + core3 { cpu = <&cpucl1_3>; }; @@ -73,12 +79,15 @@ cluster2 { core0 { cpu = <&cpucl2_0>; }; + core1 { cpu = <&cpucl2_1>; }; + core2 { cpu = <&cpucl2_2>; }; + core3 { cpu = <&cpucl2_3>; }; @@ -456,13 +465,13 @@ clock_imem: clock-controller@10010000 { reg = <0x0 0x10010000 0x0 0x3000>; #clock-cells = <1>; clocks = <&fin_pll>, - <&clock_cmu DOUT_CMU_IMEM_TCUCLK>, - <&clock_cmu DOUT_CMU_IMEM_ACLK>, - <&clock_cmu DOUT_CMU_IMEM_DMACLK>; + <&clock_cmu DOUT_CMU_IMEM_TCUCLK>, + <&clock_cmu DOUT_CMU_IMEM_ACLK>, + <&clock_cmu DOUT_CMU_IMEM_DMACLK>; clock-names = "fin_pll", - "dout_cmu_imem_tcuclk", - "dout_cmu_imem_aclk", - "dout_cmu_imem_dmaclk"; + "dout_cmu_imem_tcuclk", + "dout_cmu_imem_aclk", + "dout_cmu_imem_dmaclk"; }; clock_cmu: clock-controller@11c10000 { @@ -499,17 +508,17 @@ clock_peric: clock-controller@14010000 { reg = <0x0 0x14010000 0x0 0x3000>; #clock-cells = <1>; clocks = <&fin_pll>, - <&clock_cmu DOUT_CMU_PLL_SHARED0_DIV4>, - <&clock_cmu DOUT_CMU_PERIC_SHARED1DIV36>, - <&clock_cmu DOUT_CMU_PERIC_SHARED0DIV3_TBUCLK>, - <&clock_cmu DOUT_CMU_PERIC_SHARED0DIV20>, - <&clock_cmu DOUT_CMU_PERIC_SHARED1DIV4_DMACLK>; + <&clock_cmu DOUT_CMU_PLL_SHARED0_DIV4>, + <&clock_cmu DOUT_CMU_PERIC_SHARED1DIV36>, + <&clock_cmu DOUT_CMU_PERIC_SHARED0DIV3_TBUCLK>, + <&clock_cmu DOUT_CMU_PERIC_SHARED0DIV20>, + <&clock_cmu DOUT_CMU_PERIC_SHARED1DIV4_DMACLK>; clock-names = "fin_pll", - "dout_cmu_pll_shared0_div4", - "dout_cmu_peric_shared1div36", - "dout_cmu_peric_shared0div3_tbuclk", - "dout_cmu_peric_shared0div20", - "dout_cmu_peric_shared1div4_dmaclk"; + "dout_cmu_pll_shared0_div4", + "dout_cmu_peric_shared1div36", + "dout_cmu_peric_shared0div3_tbuclk", + "dout_cmu_peric_shared0div20", + "dout_cmu_peric_shared1div4_dmaclk"; }; sysreg_peric: system-controller@14030000 { @@ -522,13 +531,13 @@ clock_fsys0: clock-controller@15010000 { reg = <0x0 0x15010000 0x0 0x3000>; #clock-cells = <1>; clocks = <&fin_pll>, - <&clock_cmu DOUT_CMU_PLL_SHARED0_DIV6>, - <&clock_cmu DOUT_CMU_FSYS0_SHARED1DIV4>, - <&clock_cmu DOUT_CMU_FSYS0_SHARED0DIV4>; + <&clock_cmu DOUT_CMU_PLL_SHARED0_DIV6>, + <&clock_cmu DOUT_CMU_FSYS0_SHARED1DIV4>, + <&clock_cmu DOUT_CMU_FSYS0_SHARED0DIV4>; clock-names = "fin_pll", - "dout_cmu_pll_shared0_div6", - "dout_cmu_fsys0_shared1div4", - "dout_cmu_fsys0_shared0div4"; + "dout_cmu_pll_shared0_div6", + "dout_cmu_fsys0_shared1div4", + "dout_cmu_fsys0_shared0div4"; }; sysreg_fsys0: system-controller@15030000 { @@ -541,11 +550,11 @@ clock_fsys1: clock-controller@16810000 { reg = <0x0 0x16810000 0x0 0x3000>; #clock-cells = <1>; clocks = <&fin_pll>, - <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV8>, - <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV4>; + <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV8>, + <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV4>; clock-names = "fin_pll", - "dout_cmu_fsys1_shared0div8", - "dout_cmu_fsys1_shared0div4"; + "dout_cmu_fsys1_shared0div8", + "dout_cmu_fsys1_shared0div4"; }; sysreg_fsys1: system-controller@16830000 { @@ -603,6 +612,7 @@ serial_0: serial@14180000 { <&clock_peric PERIC_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -616,6 +626,7 @@ serial_1: serial@14190000 { <&clock_peric PERIC_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; samsung,uart-fifosize = <64>; + status = "disabled"; }; @@ -658,6 +669,7 @@ pwm_0: pwm@14100000 { #pwm-cells = <3>; clocks = <&clock_peric PERIC_PWM0_IPCLKPORT_I_PCLK_S0>; clock-names = "timers"; + status = "disabled"; }; @@ -668,6 +680,7 @@ pwm_1: pwm@14110000 { #pwm-cells = <3>; clocks = <&clock_peric PERIC_PWM1_IPCLKPORT_I_PCLK_S0>; clock-names = "timers"; + status = "disabled"; }; @@ -681,6 +694,7 @@ hsi2c_0: i2c@14200000 { pinctrl-0 = <&hs_i2c0_bus>; clocks = <&clock_peric PERIC_PCLK_HSI2C0>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -694,6 +708,7 @@ hsi2c_1: i2c@14210000 { pinctrl-0 = <&hs_i2c1_bus>; clocks = <&clock_peric PERIC_PCLK_HSI2C1>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -707,6 +722,7 @@ hsi2c_2: i2c@14220000 { pinctrl-0 = <&hs_i2c2_bus>; clocks = <&clock_peric PERIC_PCLK_HSI2C2>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -720,6 +736,7 @@ hsi2c_3: i2c@14230000 { pinctrl-0 = <&hs_i2c3_bus>; clocks = <&clock_peric PERIC_PCLK_HSI2C3>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -733,6 +750,7 @@ hsi2c_4: i2c@14240000 { pinctrl-0 = <&hs_i2c4_bus>; clocks = <&clock_peric PERIC_PCLK_HSI2C4>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -746,6 +764,7 @@ hsi2c_5: i2c@14250000 { pinctrl-0 = <&hs_i2c5_bus>; clocks = <&clock_peric PERIC_PCLK_HSI2C5>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -759,6 +778,7 @@ hsi2c_6: i2c@14260000 { pinctrl-0 = <&hs_i2c6_bus>; clocks = <&clock_peric PERIC_PCLK_HSI2C6>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -772,6 +792,7 @@ hsi2c_7: i2c@14270000 { pinctrl-0 = <&hs_i2c7_bus>; clocks = <&clock_peric PERIC_PCLK_HSI2C7>; clock-names = "hsi2c"; + status = "disabled"; }; @@ -789,6 +810,7 @@ i2s_0: i2s@140e0000 { pinctrl-names = "default"; pinctrl-0 = <&i2s0_bus>; #sound-dai-cells = <1>; + status = "disabled"; }; @@ -806,6 +828,7 @@ i2s_1: i2s@140f0000 { pinctrl-names = "default"; pinctrl-0 = <&i2s1_bus>; #sound-dai-cells = <1>; + status = "disabled"; }; @@ -840,6 +863,7 @@ m_can0: can@14088000 { <&clock_peric PERIC_MCAN0_IPCLKPORT_CCLK>; clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; }; @@ -857,6 +881,7 @@ m_can1: can@14098000 { <&clock_peric PERIC_MCAN1_IPCLKPORT_CCLK>; clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; }; @@ -874,6 +899,7 @@ m_can2: can@140a8000 { <&clock_peric PERIC_MCAN2_IPCLKPORT_CCLK>; clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; }; @@ -891,6 +917,7 @@ m_can3: can@140b8000 { <&clock_peric PERIC_MCAN3_IPCLKPORT_CCLK>; clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; + status = "disabled"; }; @@ -903,12 +930,13 @@ spi_0: spi@14140000 { #address-cells = <1>; #size-cells = <0>; clocks = <&clock_peric PERIC_PCLK_SPI0>, - <&clock_peric PERIC_SCLK_SPI0>; + <&clock_peric PERIC_SCLK_SPI0>; clock-names = "spi", "spi_busclk0"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; num-cs = <1>; + status = "disabled"; }; @@ -921,12 +949,13 @@ spi_1: spi@14150000 { #address-cells = <1>; #size-cells = <0>; clocks = <&clock_peric PERIC_PCLK_SPI1>, - <&clock_peric PERIC_SCLK_SPI1>; + <&clock_peric PERIC_SCLK_SPI1>; clock-names = "spi", "spi_busclk0"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; num-cs = <1>; + status = "disabled"; }; @@ -939,12 +968,13 @@ spi_2: spi@14160000 { #address-cells = <1>; #size-cells = <0>; clocks = <&clock_peric PERIC_PCLK_SPI2>, - <&clock_peric PERIC_SCLK_SPI2>; + <&clock_peric PERIC_SCLK_SPI2>; clock-names = "spi", "spi_busclk0"; samsung,spi-src-clk = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; num-cs = <1>; + status = "disabled"; }; @@ -952,21 +982,21 @@ timer@10040000 { compatible = "tesla,fsd-mct", "samsung,exynos4210-mct"; reg = <0x0 0x10040000 0x0 0x800>; interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; clocks = <&fin_pll>, <&clock_imem IMEM_MCT_PCLK>; clock-names = "fin_pll", "mct"; }; @@ -1007,6 +1037,7 @@ ethernet1: ethernet@14300000 { <ð1_rx_ctrl>, <ð1_mdio>; local-mac-address = [00 00 00 00 00 00]; iommus = <&smmu_peric 0x0 0x1>; + status = "disabled"; }; @@ -1026,6 +1057,7 @@ ufs: ufs@15120000 { pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>; phys = <&ufs_phy>; phy-names = "ufs-phy"; + status = "disabled"; }; @@ -1056,6 +1088,7 @@ ethernet0: ethernet@15300000 { <ð0_rx_ctrl>, <ð0_mdio>; local-mac-address = [00 00 00 00 00 00]; iommus = <&smmu_fsys0 0x0 0x1>; + status = "disabled"; }; };