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drm/amdgpu: Updated compute partition validation

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DPX is only valid partition mode in NPS2.
Updated check which was making CPX as
available compute partition mode instead of DPX

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mangesh Gadre 2026-07-17 11:13:02 +00:00 committed by Alex Deucher
parent da352ff193
commit ae6552ed04
1 changed files with 5 additions and 3 deletions
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8
drivers/gpu/drm/amd/amdgpu/soc_v1_0.c
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@ -632,7 +632,7 @@ static bool __soc_v1_0_is_valid_mode(struct amdgpu_xcp_mgr *xcp_mgr,
case AMDGPU_SPX_PARTITION_MODE:
return adev->gmc.num_mem_partitions == 1 && num_xcc > 0;
case AMDGPU_DPX_PARTITION_MODE:
return adev->gmc.num_mem_partitions <= 2 && (num_xcc % 4) == 0;
return adev->gmc.num_mem_partitions <= 2 && (num_xcc % 2) == 0;
case AMDGPU_TPX_PARTITION_MODE:
return (adev->gmc.num_mem_partitions == 1 ||
adev->gmc.num_mem_partitions == 3) &&
@ -647,8 +647,10 @@ static bool __soc_v1_0_is_valid_mode(struct amdgpu_xcp_mgr *xcp_mgr,
* (num_xcc % adev->gmc.num_mem_partitions) == 0 because
* num_compute_partitions can't be less than num_mem_partitions
*/
return ((num_xcc > 1) &&
(num_xcc % adev->gmc.num_mem_partitions) == 0);
return (adev->gmc.num_mem_partitions == 1 ||
adev->gmc.num_mem_partitions == 4) &&
(num_xcc > 1) &&
(num_xcc % adev->gmc.num_mem_partitions) == 0;
default:
return false;
}