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arm64: dts: exynosautov920: enable support for ufs controller

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Add ufs node for ExynosAutov920 SoC. Also enable ufs_phy and
ufs controller nodes.

Signed-off-by: Sowon Na <sowon.na@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://patch.msgid.link/20260417121452.827054-5-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Sowon Na 2026-04-17 17:44:52 +05:30 committed by Krzysztof Kozlowski
parent 14b0c168c7
commit ae326b14b2
2 changed files with 29 additions and 0 deletions
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8
arch/arm64/boot/dts/exynos/exynosautov920-sadk.dts
View File

@ -83,6 +83,14 @@ &usi_0 {
status = "okay";
};
&ufs_0 {
status = "okay";
};
&ufs_0_phy {
status = "okay";
};
&xtcxo {
clock-frequency = <38400000>;
};

21
arch/arm64/boot/dts/exynos/exynosautov920.dtsi
View File

@ -1444,6 +1444,27 @@ pinctrl_hsi2ufs: pinctrl@16d20000 {
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
};
ufs_0: ufs@16e00000 {
compatible = "samsung,exynosautov920-ufs";
reg = <0x16e00000 0x100>,
<0x16e01100 0x400>,
<0x16e80000 0x8000>,
<0x16d08000 0x800>;
reg-names = "hci", "vs_hci", "unipro", "ufsp";
interrupts = <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_hsi2 CLK_MOUT_HSI2_UFS_EMBD_USER>,
<&cmu_hsi2 CLK_MOUT_HSI2_NOC_UFS_USER>;
clock-names = "core_clk", "sclk_unipro_main";
freq-table-hz = <0 0>, <0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
phys = <&ufs_0_phy>;
phy-names = "ufs-phy";
samsung,sysreg = <&syscon_hsi2 0x710>;
dma-coherent;
status = "disabled";
};
ufs_0_phy: phy@16e04000 {
compatible = "samsung,exynosautov920-ufs-phy";
reg = <0x16e04000 0x4000>;