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drm-misc-next for 5.14:

Browse Source 
UAPI Changes:
 
 Cross-subsystem Changes:
 
 Core Changes:
 
  * aperture: Fix unlocking on errors
 
  * legacy: Fix some doc comments
 
 Driver Changes:
 
  * drm/amdgpu: Free resource on fence usage query; Fix fence calculation;
 
  * drm/bridge: Lt9611: Add missing MODULE_DEVICE_TABLE
 
  * drm/i915: Print formats with %p4cc
 
  * drm/ingenic: IPU planes are now always of type OVERLAY
 
  * drm/nouveau: Remove left-over reference to struct drm_device.pdev
 
  * drm/panfrost: Disable devfreq if num_supplies > 1; Add Mediatek MT8183 +
    DT bindings; Cleanups
 
  * drm/simpledrm: Print resources with %pr; Fix use-after-free errors;
    Fix NULL deref; Fix MAINTAINERS entry
 
  * drm/vmwgfx: Fix memory allocation and leak in FIFO allocation; Fix
    return value in PCI resource setup
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Merge tag 'drm-misc-next-2021-05-17' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 5.14:

UAPI Changes:

Cross-subsystem Changes:

Core Changes:

 * aperture: Fix unlocking on errors

 * legacy: Fix some doc comments

Driver Changes:

 * drm/amdgpu: Free resource on fence usage query; Fix fence calculation;

 * drm/bridge: Lt9611: Add missing MODULE_DEVICE_TABLE

 * drm/i915: Print formats with %p4cc

 * drm/ingenic: IPU planes are now always of type OVERLAY

 * drm/nouveau: Remove left-over reference to struct drm_device.pdev

 * drm/panfrost: Disable devfreq if num_supplies > 1; Add Mediatek MT8183 +
   DT bindings; Cleanups

 * drm/simpledrm: Print resources with %pr; Fix use-after-free errors;
   Fix NULL deref; Fix MAINTAINERS entry

 * drm/vmwgfx: Fix memory allocation and leak in FIFO allocation; Fix
   return value in PCI resource setup

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/YKJs2IfwSYvuGPU7@linux-uq9g.fritz.box
This commit is contained in:
Dave Airlie 2021-05-20 13:30:27 +10:00
commit ae25ec2fc6
17 changed files with 108 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
View File

@ -17,6 +17,7 @@ properties:
items:
- enum:
- amlogic,meson-g12a-mali
- mediatek,mt8183-mali
- realtek,rtd1619-mali
- rockchip,px30-mali
- const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
@ -41,10 +42,13 @@ properties:
mali-supply: true
sram-supply: true
operating-points-v2: true
power-domains:
maxItems: 1
minItems: 1
maxItems: 3
resets:
maxItems: 2
@ -89,6 +93,30 @@ allOf:
then:
required:
- resets
- if:
properties:
compatible:
contains:
const: mediatek,mt8183-mali
then:
properties:
power-domains:
minItems: 3
power-domain-names:
items:
- const: core0
- const: core1
- const: core2
required:
- sram-supply
- power-domains
- power-domain-names
else:
properties:
power-domains:
maxItems: 1
sram-supply: false
examples:
- |

2
MAINTAINERS
View File

@ -5875,7 +5875,7 @@ M: Thomas Zimmermann <tzimmermann@suse.de>
L: dri-devel@lists.freedesktop.org
S: Maintained
T: git git://anongit.freedesktop.org/drm/drm-misc
F: drivers/gpu/drm/tiny/simplekms.c
F: drivers/gpu/drm/tiny/simpledrm.c
DRM DRIVER FOR SIS VIDEO CARDS
S: Orphan / Obsolete

27
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
View File

@ -652,12 +652,14 @@ void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
mutex_destroy(&mgr->lock);
}
void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity,
ktime_t *total, ktime_t *max)
static void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx,
struct amdgpu_ctx_entity *centity, ktime_t *total, ktime_t *max)
{
ktime_t now, t1;
uint32_t i;
*total = *max = 0;
now = ktime_get();
for (i = 0; i < amdgpu_sched_jobs; i++) {
struct dma_fence *fence;
@ -669,11 +671,15 @@ void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *cen
if (!fence)
continue;
s_fence = to_drm_sched_fence(fence);
if (!dma_fence_is_signaled(&s_fence->scheduled))
if (!dma_fence_is_signaled(&s_fence->scheduled)) {
dma_fence_put(fence);
continue;
}
t1 = s_fence->scheduled.timestamp;
if (t1 >= now)
if (!ktime_before(t1, now)) {
dma_fence_put(fence);
continue;
}
if (dma_fence_is_signaled(&s_fence->finished) &&
s_fence->finished.timestamp < now)
*total += ktime_sub(s_fence->finished.timestamp, t1);
@ -699,11 +705,22 @@ ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
idp = &mgr->ctx_handles;
mutex_lock(&mgr->lock);
idr_for_each_entry(idp, ctx, id) {
ktime_t ttotal, tmax;
if (!ctx->entities[hwip][idx])
continue;
centity = ctx->entities[hwip][idx];
amdgpu_ctx_fence_time(ctx, centity, &total, &max);
amdgpu_ctx_fence_time(ctx, centity, &ttotal, &tmax);
/* Harmonic mean approximation diverges for very small
* values. If ratio < 0.01% ignore
*/
if (AMDGPU_CTX_FENCE_USAGE_MIN_RATIO(tmax, ttotal))
continue;
total = ktime_add(total, ttotal);
max = ktime_after(tmax, max) ? tmax : max;
}
mutex_unlock(&mgr->lock);

3
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h
View File

@ -30,6 +30,7 @@ struct drm_file;
struct amdgpu_fpriv;
#define AMDGPU_MAX_ENTITY_NUM 4
#define AMDGPU_CTX_FENCE_USAGE_MIN_RATIO(max, total) ((max) > 16384ULL*(total))
struct amdgpu_ctx_entity {
uint64_t sequence;
@ -89,6 +90,4 @@ long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout);
void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
ktime_t amdgpu_ctx_mgr_fence_usage(struct amdgpu_ctx_mgr *mgr, uint32_t hwip,
uint32_t idx, uint64_t *elapsed);
void amdgpu_ctx_fence_time(struct amdgpu_ctx *ctx, struct amdgpu_ctx_entity *centity,
ktime_t *total, ktime_t *max);
#endif

1
drivers/gpu/drm/bridge/lontium-lt9611.c
View File

@ -1215,6 +1215,7 @@ static struct i2c_device_id lt9611_id[] = {
{ "lontium,lt9611", 0 },
{}
};
MODULE_DEVICE_TABLE(i2c, lt9611_id);
static const struct of_device_id lt9611_match_table[] = {
{ .compatible = "lontium,lt9611" },

8
drivers/gpu/drm/drm_aperture.c
View File

@ -164,13 +164,17 @@ static int devm_aperture_acquire(struct drm_device *dev,
list_for_each(pos, &drm_apertures) {
ap = container_of(pos, struct drm_aperture, lh);
if (overlap(base, end, ap->base, ap->base + ap->size))
if (overlap(base, end, ap->base, ap->base + ap->size)) {
mutex_unlock(&drm_apertures_lock);
return -EBUSY;
}
}
ap = devm_kzalloc(dev->dev, sizeof(*ap), GFP_KERNEL);
if (!ap)
if (!ap) {
mutex_unlock(&drm_apertures_lock);
return -ENOMEM;
}
ap->dev = dev;
ap->base = base;

2
drivers/gpu/drm/drm_context.c
View File

@ -124,7 +124,7 @@ void drm_legacy_ctxbitmap_cleanup(struct drm_device * dev)
}
/**
* drm_ctxbitmap_flush() - Flush all contexts owned by a file
* drm_legacy_ctxbitmap_flush() - Flush all contexts owned by a file
* @dev: DRM device to operate on
* @file: Open file to flush contexts for
*

6
drivers/gpu/drm/i915/display/skl_universal_plane.c
View File

@ -1082,7 +1082,6 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
struct drm_format_name_buf format_name;
if (!fb)
return 0;
@ -1130,9 +1129,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XVYU12_16161616:
case DRM_FORMAT_XVYU16161616:
drm_dbg_kms(&dev_priv->drm,
"Unsupported pixel format %s for 90/270!\n",
drm_get_format_name(fb->format->format,
&format_name));
"Unsupported pixel format %p4cc for 90/270!\n",
&fb->format->format);
return -EINVAL;
default:
break;

11
drivers/gpu/drm/ingenic/ingenic-drm-drv.c
View File

@ -419,7 +419,7 @@ static void ingenic_drm_plane_enable(struct ingenic_drm *priv,
unsigned int en_bit;
if (priv->soc_info->has_osd) {
if (plane->type == DRM_PLANE_TYPE_PRIMARY)
if (plane != &priv->f0)
en_bit = JZ_LCD_OSDC_F1EN;
else
en_bit = JZ_LCD_OSDC_F0EN;
@ -434,7 +434,7 @@ void ingenic_drm_plane_disable(struct device *dev, struct drm_plane *plane)
unsigned int en_bit;
if (priv->soc_info->has_osd) {
if (plane->type == DRM_PLANE_TYPE_PRIMARY)
if (plane != &priv->f0)
en_bit = JZ_LCD_OSDC_F1EN;
else
en_bit = JZ_LCD_OSDC_F0EN;
@ -461,8 +461,7 @@ void ingenic_drm_plane_config(struct device *dev,
ingenic_drm_plane_enable(priv, plane);
if (priv->soc_info->has_osd &&
plane->type == DRM_PLANE_TYPE_PRIMARY) {
if (priv->soc_info->has_osd && plane != &priv->f0) {
switch (fourcc) {
case DRM_FORMAT_XRGB1555:
ctrl |= JZ_LCD_OSDCTRL_RGB555;
@ -510,7 +509,7 @@ void ingenic_drm_plane_config(struct device *dev,
}
if (priv->soc_info->has_osd) {
if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
if (plane != &priv->f0) {
xy_reg = JZ_REG_LCD_XYP1;
size_reg = JZ_REG_LCD_SIZE1;
} else {
@ -561,7 +560,7 @@ static void ingenic_drm_plane_atomic_update(struct drm_plane *plane,
height = newstate->src_h >> 16;
cpp = newstate->fb->format->cpp[0];
if (!priv->soc_info->has_osd || plane->type == DRM_PLANE_TYPE_OVERLAY)
if (!priv->soc_info->has_osd || plane == &priv->f0)
hwdesc = &priv->dma_hwdescs->hwdesc_f0;
else
hwdesc = &priv->dma_hwdescs->hwdesc_f1;

2
drivers/gpu/drm/ingenic/ingenic-ipu.c
View File

@ -767,7 +767,7 @@ static int ingenic_ipu_bind(struct device *dev, struct device *master, void *d)
err = drm_universal_plane_init(drm, plane, 1, &ingenic_ipu_plane_funcs,
soc_info->formats, soc_info->num_formats,
NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
NULL, DRM_PLANE_TYPE_OVERLAY, NULL);
if (err) {
dev_err(dev, "Failed to init plane: %i\n", err);
return err;

3
drivers/gpu/drm/nouveau/nouveau_connector.c
View File

@ -460,7 +460,8 @@ nouveau_connector_of_detect(struct drm_connector *connector)
struct drm_device *dev = connector->dev;
struct nouveau_connector *nv_connector = nouveau_connector(connector);
struct nouveau_encoder *nv_encoder;
struct device_node *cn, *dn = pci_device_to_OF_node(dev->pdev);
struct pci_dev *pdev = to_pci_dev(dev->dev);
struct device_node *cn, *dn = pci_device_to_OF_node(pdev);
if (!dn ||
!((nv_encoder = find_encoder(connector, DCB_OUTPUT_TMDS)) ||

9
drivers/gpu/drm/panfrost/panfrost_devfreq.c
View File

@ -92,6 +92,15 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev)
struct thermal_cooling_device *cooling;
struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq;
if (pfdev->comp->num_supplies > 1) {
/*
* GPUs with more than 1 supply require platform-specific handling:
* continue without devfreq
*/
DRM_DEV_INFO(dev, "More than 1 supply is not supported yet\n");
return 0;
}
ret = devm_pm_opp_set_regulators(dev, pfdev->comp->supply_names,
pfdev->comp->num_supplies);
if (ret) {

1
drivers/gpu/drm/panfrost/panfrost_device.c
View File

@ -238,7 +238,6 @@ int panfrost_device_init(struct panfrost_device *pfdev)
res = platform_get_resource(pfdev->pdev, IORESOURCE_MEM, 0);
pfdev->iomem = devm_ioremap_resource(pfdev->dev, res);
if (IS_ERR(pfdev->iomem)) {
dev_err(pfdev->dev, "failed to ioremap iomem\n");
err = PTR_ERR(pfdev->iomem);
goto out_pm_domain;
}

10
drivers/gpu/drm/panfrost/panfrost_drv.c
View File

@ -665,6 +665,15 @@ static const struct panfrost_compatible amlogic_data = {
.vendor_quirk = panfrost_gpu_amlogic_quirk,
};
const char * const mediatek_mt8183_supplies[] = { "mali", "sram" };
const char * const mediatek_mt8183_pm_domains[] = { "core0", "core1", "core2" };
static const struct panfrost_compatible mediatek_mt8183_data = {
.num_supplies = ARRAY_SIZE(mediatek_mt8183_supplies),
.supply_names = mediatek_mt8183_supplies,
.num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains),
.pm_domain_names = mediatek_mt8183_pm_domains,
};
static const struct of_device_id dt_match[] = {
/* Set first to probe before the generic compatibles */
{ .compatible = "amlogic,meson-gxm-mali",
@ -681,6 +690,7 @@ static const struct of_device_id dt_match[] = {
{ .compatible = "arm,mali-t860", .data = &default_data, },
{ .compatible = "arm,mali-t880", .data = &default_data, },
{ .compatible = "arm,mali-bifrost", .data = &default_data, },
{ .compatible = "mediatek,mt8183-mali", .data = &mediatek_mt8183_data },
{}
};
MODULE_DEVICE_TABLE(of, dt_match);

15
drivers/gpu/drm/tiny/simpledrm.c
View File

@ -72,6 +72,7 @@ simplefb_get_validated_format(struct drm_device *dev, const char *format_name)
static const struct simplefb_format formats[] = SIMPLEFB_FORMATS;
const struct simplefb_format *fmt = formats;
const struct simplefb_format *end = fmt + ARRAY_SIZE(formats);
const struct drm_format_info *info;
if (!format_name) {
drm_err(dev, "simplefb: missing framebuffer format\n");
@ -79,8 +80,12 @@ simplefb_get_validated_format(struct drm_device *dev, const char *format_name)
}
while (fmt < end) {
if (!strcmp(format_name, fmt->name))
return drm_format_info(fmt->fourcc);
if (!strcmp(format_name, fmt->name)) {
info = drm_format_info(fmt->fourcc);
if (!info)
return ERR_PTR(-EINVAL);
return info;
}
++fmt;
}
@ -298,6 +303,7 @@ static int simpledrm_device_init_clocks(struct simpledrm_device *sdev)
drm_err(dev, "failed to enable clock %u: %d\n",
i, ret);
clk_put(clock);
continue;
}
sdev->clks[i] = clock;
}
@ -415,6 +421,7 @@ static int simpledrm_device_init_regulators(struct simpledrm_device *sdev)
drm_err(dev, "failed to enable regulator %u: %d\n",
i, ret);
regulator_put(regulator);
continue;
}
sdev->regulators[i++] = regulator;
@ -530,8 +537,8 @@ static int simpledrm_device_init_mm(struct simpledrm_device *sdev)
ret = devm_aperture_acquire_from_firmware(dev, mem->start, resource_size(mem));
if (ret) {
drm_err(dev, "could not acquire memory range [0x%llx:0x%llx]: error %d\n",
mem->start, mem->end, ret);
drm_err(dev, "could not acquire memory range %pr: error %d\n",
mem, ret);
return ret;
}

6
drivers/gpu/drm/vmwgfx/vmwgfx_cmd.c
View File

@ -105,10 +105,14 @@ struct vmw_fifo_state *vmw_fifo_create(struct vmw_private *dev_priv)
return NULL;
fifo = kzalloc(sizeof(*fifo), GFP_KERNEL);
if (!fifo)
return ERR_PTR(-ENOMEM);
fifo->static_buffer_size = VMWGFX_FIFO_STATIC_SIZE;
fifo->static_buffer = vmalloc(fifo->static_buffer_size);
if (unlikely(fifo->static_buffer == NULL))
if (unlikely(fifo->static_buffer == NULL)) {
kfree(fifo);
return ERR_PTR(-ENOMEM);
}
fifo->dynamic_buffer = NULL;
fifo->reserved_size = 0;

4
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
View File

@ -719,10 +719,10 @@ static int vmw_setup_pci_resources(struct vmw_private *dev,
dev->rmmio = devm_ioremap(dev->drm.dev,
rmmio_start,
rmmio_size);
if (IS_ERR(dev->rmmio)) {
if (!dev->rmmio) {
DRM_ERROR("Failed mapping registers mmio memory.\n");
pci_release_regions(pdev);
return PTR_ERR(dev->rmmio);
return -ENOMEM;
}
} else if (pci_id == VMWGFX_PCI_ID_SVGA2) {
dev->io_start = pci_resource_start(pdev, 0);