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ata fixes for 7.4-rc4

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- Explicitly clear upper address bits on quirked AHCI controllers
 
    AHCI controllers that claim to support 64-bit DMA, but which have
    been quirked to only do 32-bit DMA, could start the DMA engine
    with a non-zero value in the upper address bits registers (me)
 
  - Fix a resource leak in ahci_platform_get_resources() (Wentao)
 
  - Fix invalid kernel-doc formatting for ata_dsm_trim_pages() (me)
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Merge tag 'ata-7.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux

Pull ata fixes from Niklas Cassel:

 - Explicitly clear upper address bits on quirked AHCI controllers

   AHCI controllers that claim to support 64-bit DMA, but which have
   been quirked to only do 32-bit DMA, could start the DMA engine with a
   non-zero value in the upper address bits registers (me)

 - Fix a resource leak in ahci_platform_get_resources() (Wentao)

 - Fix invalid kernel-doc formatting for ata_dsm_trim_pages() (me)

* tag 'ata-7.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux:
  ata: libata-scsi: fix ata_dsm_trim_pages() kernel-doc
  ata: libahci_platform: Fix device reference leak in ahci_platform_get_resources()
  ata: libahci: clear PxCLBU and PxFBU for AHCI_HFLAG_32BIT_ONLY
This commit is contained in:
Linus Torvalds 2026-09-18 10:51:14 -07:00
commit ae09f35bd3
3 changed files with 18 additions and 6 deletions
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15
drivers/ata/libahci.c
View File

@ -744,15 +744,28 @@ void ahci_start_fis_rx(struct ata_port *ap)
struct ahci_port_priv *pp = ap->private_data;
u32 tmp;
/* set FIS registers */
/*
* On HBAs that only support 32-bit addressing PxCLBU is read only '0'.
* When applying the AHCI_HFLAG_32BIT_ONLY quirk, PxCLBU is RW, and the
* reset value is Implementation Specific, so we need to clear it to 0.
*/
if (hpriv->cap & HOST_CAP_64)
writel((pp->cmd_slot_dma >> 16) >> 16,
port_mmio + PORT_LST_ADDR_HI);
else if (hpriv->flags & AHCI_HFLAG_32BIT_ONLY)
writel(0, port_mmio + PORT_LST_ADDR_HI);
writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR);
/*
* On HBAs that only support 32-bit addressing PxFBU is read only '0'.
* When applying the AHCI_HFLAG_32BIT_ONLY quirk, PxFBU is RW, and the
* reset value is Implementation Specific, so we need to clear it to 0.
*/
if (hpriv->cap & HOST_CAP_64)
writel((pp->rx_fis_dma >> 16) >> 16,
port_mmio + PORT_FIS_ADDR_HI);
else if (hpriv->flags & AHCI_HFLAG_32BIT_ONLY)
writel(0, port_mmio + PORT_FIS_ADDR_HI);
writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR);
/* enable FIS reception */

2
drivers/ata/libahci_platform.c
View File

@ -620,10 +620,10 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
of_platform_device_create(child, NULL, NULL);
port_dev = of_find_device_by_node(child);
if (port_dev) {
rc = ahci_platform_get_regulator(hpriv, port,
&port_dev->dev);
put_device(&port_dev->dev);
if (rc == -EPROBE_DEFER)
goto err_out;
}

7
drivers/ata/libata-scsi.c
View File

@ -2297,10 +2297,9 @@ static unsigned int ata_scsiop_inq_89(struct ata_device *dev,
* logical block, so it can hold at most sector_size / 512 pages.
*
* Return: the maximum number of 512-byte pages a single translated WRITE SAME
* command may send to @dev (never less than one), that is the smaller of:
* - MAX PAGES PER DSM COMMAND (IDENTIFY DEVICE word 105), when the device
* reports a non-zero limit; and
* - the logical sector size expressed in 512-byte pages (see above).
* command may send to @dev, that is the smaller of MAX PAGES PER DSM COMMAND
* (IDENTIFY DEVICE word 105, when the device reports a non-zero limit) and
* the logical sector size expressed in 512-byte pages; never less than one.
*/
static unsigned int ata_dsm_trim_pages(struct ata_device *dev)
{