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drm/amd/display: Separate caps for maximum RGB and YUV plane counts

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Not all ASICs have same plane capabilities so need to split them
out for proper support handling.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Atufa Khan <Atufa.Khan@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Solomon Chiu <solomon.chiu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Atufa Khan 2021-02-25 16:18:35 -05:00 committed by Alex Deucher
parent e69231c445
commit ae0305708e
8 changed files with 16 additions and 0 deletions
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2
drivers/gpu/drm/amd/display/dc/dc.h
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@ -155,6 +155,8 @@ struct dc_caps {
uint32_t max_links;
uint32_t max_audios;
uint32_t max_slave_planes;
uint32_t max_slave_yuv_planes;
uint32_t max_slave_rgb_planes;
uint32_t max_planes;
uint32_t max_downscale_ratio;
uint32_t i2c_speed_in_khz;

2
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
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@ -1272,6 +1272,8 @@ static bool underlay_create(struct dc_context *ctx, struct resource_pool *pool)
/* update the public caps to indicate an underlay is available */
ctx->dc->caps.max_slave_planes = 1;
ctx->dc->caps.max_slave_yuv_planes = 1;
ctx->dc->caps.max_slave_rgb_planes = 0;
return true;
}

2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
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@ -1422,6 +1422,8 @@ static bool dcn10_resource_construct(
dc->caps.max_cursor_size = 256;
dc->caps.min_horizontal_blanking_period = 80;
dc->caps.max_slave_planes = 1;
dc->caps.max_slave_yuv_planes = 1;
dc->caps.max_slave_rgb_planes = 0;
dc->caps.is_apu = true;
dc->caps.post_blend_color_processing = false;
dc->caps.extended_aux_timeout_support = false;

2
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
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@ -3703,6 +3703,8 @@ static bool dcn20_resource_construct(
dc->caps.dmdata_alloc_size = 2048;
dc->caps.max_slave_planes = 1;
dc->caps.max_slave_yuv_planes = 1;
dc->caps.max_slave_rgb_planes = 1;
dc->caps.post_blend_color_processing = true;
dc->caps.force_dp_tps4_for_cp2520 = true;
dc->caps.extended_aux_timeout_support = true;

2
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
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@ -1982,6 +1982,8 @@ static bool dcn21_resource_construct(
dc->caps.dmdata_alloc_size = 2048;
dc->caps.max_slave_planes = 1;
dc->caps.max_slave_yuv_planes = 1;
dc->caps.max_slave_rgb_planes = 1;
dc->caps.post_blend_color_processing = true;
dc->caps.force_dp_tps4_for_cp2520 = true;
dc->caps.extended_aux_timeout_support = true;

2
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
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@ -2568,6 +2568,8 @@ static bool dcn30_resource_construct(
dc->caps.cursor_cache_size = dc->caps.max_cursor_size * dc->caps.max_cursor_size * 8;
dc->caps.max_slave_planes = 1;
dc->caps.max_slave_yuv_planes = 1;
dc->caps.max_slave_rgb_planes = 1;
dc->caps.post_blend_color_processing = true;
dc->caps.force_dp_tps4_for_cp2520 = true;
dc->caps.extended_aux_timeout_support = true;

2
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
View File

@ -1672,6 +1672,8 @@ static bool dcn301_resource_construct(
dc->caps.min_horizontal_blanking_period = 80;
dc->caps.dmdata_alloc_size = 2048;
dc->caps.max_slave_planes = 1;
dc->caps.max_slave_yuv_planes = 1;
dc->caps.max_slave_rgb_planes = 1;
dc->caps.is_apu = true;
dc->caps.post_blend_color_processing = true;
dc->caps.force_dp_tps4_for_cp2520 = true;

2
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
View File

@ -1483,6 +1483,8 @@ static bool dcn302_resource_construct(
dc->caps.mall_size_total = dc->caps.mall_size_per_mem_channel * dc->ctx->dc_bios->vram_info.num_chans * 1048576;
dc->caps.cursor_cache_size = dc->caps.max_cursor_size * dc->caps.max_cursor_size * 8;
dc->caps.max_slave_planes = 1;
dc->caps.max_slave_yuv_planes = 1;
dc->caps.max_slave_rgb_planes = 1;
dc->caps.post_blend_color_processing = true;
dc->caps.force_dp_tps4_for_cp2520 = true;
dc->caps.extended_aux_timeout_support = true;