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xhci: fix frame id calculation and checks for isoc URBs
Check if the expected frame IDs for a isochronous URB submitted mid stream is within the valid frame time window that xHC controller is capable of queuing TDs. The range only needs to be checked once per URB as the isoc TDs of an URB are queued in one go with spinlock held and interrupts disabled. Calculate the valid frame window start and end frame id in frames instead of microframes to better match how xhci specification section 4.11.2.5 does it. Don't add frame id gaps or change scheduling to SIA mid stream if the start frame is outside the valid frame winow. Only print a debug message. Some devices can't handle gaps in isochronous transfers. Calculate a valid start frame for the first URB of a stream, and align it to a full frame, or to interval start if interval is longer than a frame Set urb->start_frame value for every URB cc: Dylan Robinson <dylan_robinson@motu.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Link: https://patch.msgid.link/20260806142113.2436238-2-mathias.nyman@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mathias Nyman
Greg Kroah-Hartman
parent
05abeffcc2
commit
add8469b3e
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@ -1493,6 +1493,7 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
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return -ENOMEM;
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virt_dev->eps[ep_index].skip = false;
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virt_dev->eps[ep_index].next_uframe = -1;
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ep_ring = virt_dev->eps[ep_index].new_ring;
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xhci_ring_init(xhci, ep_ring);
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@ -3956,80 +3956,77 @@ static int xhci_ist_microframes(struct xhci_hcd *xhci)
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}
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/*
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* Calculates Frame ID field of the isochronous TRB identifies the
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* target frame that the Interval associated with this Isochronous
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* Transfer Descriptor will start on. Refer to 4.11.2.5 in 1.1 spec.
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*
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* Returns actual frame id on success, negative value on error.
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* Check if frame is in the valid frame window, including start and end.
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* If start > end then assume window wrapped around at a limit the frame
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* value won't exceed.
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*/
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static int xhci_get_isoc_frame_id(struct xhci_hcd *xhci,
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struct urb *urb, int index)
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static bool xhci_frame_in_range(u32 frame, u32 start, u32 end)
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{
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int start_frame, ist, ret = 0;
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int start_frame_id, end_frame_id, current_frame_id;
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/* frame window end wrapped around */
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if (start > end)
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return frame >= start || frame <= end;
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if (urb->dev->speed == USB_SPEED_LOW ||
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urb->dev->speed == USB_SPEED_FULL)
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start_frame = urb->start_frame + index * urb->interval;
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else
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start_frame = (urb->start_frame + index * urb->interval) >> 3;
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return frame >= start && frame <= end;
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}
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/*
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* Set the urb->start_frame of the URB.
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*
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* Returns microframe index of first TD
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*/
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static int xhci_get_isoc_start_frame(struct xhci_hcd *xhci, struct urb *urb,
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struct xhci_virt_ep *ep)
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{
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u32 curr_frame, start_uframe;
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u32 urb_start, urb_end;
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u32 win_start, win_end;
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bool frame_unit;
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int uinterval;
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u32 mfindex;
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int ist;
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/* check if urb uses frame units instead of microframes */
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frame_unit = (urb->dev->speed == USB_SPEED_FULL ||
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urb->dev->speed == USB_SPEED_LOW);
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uinterval = urb->interval;
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if (frame_unit)
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uinterval *= 8;
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/* get current microframe index and isoc scheduling threshold */
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mfindex = readl(&xhci->run_regs->microframe_index);
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ist = xhci_ist_microframes(xhci);
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/* Software shall not schedule an Isoch TD with a Frame ID value that
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* is less than the Start Frame ID or greater than the End Frame ID,
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* where:
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*
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* End Frame ID = (Current MFINDEX register value + 895 ms.) MOD 2048
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* Start Frame ID = (Current MFINDEX register value + IST + 1) MOD 2048
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*
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* Both the End Frame ID and Start Frame ID values are calculated
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* in microframes. When software determines the valid Frame ID value;
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* The End Frame ID value should be rounded down to the nearest Frame
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* boundary, and the Start Frame ID value should be rounded up to the
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* nearest Frame boundary.
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*/
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current_frame_id = readl(&xhci->run_regs->microframe_index);
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start_frame_id = roundup(current_frame_id + ist + 1, 8);
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end_frame_id = rounddown(current_frame_id + 895 * 8, 8);
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/* calculate valid frame window, in frame units, see xhci 4.11.2.5 */
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curr_frame = MFINDEX_TO_FRAME(mfindex);
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win_start = (curr_frame + DIV_ROUND_UP_POW2(ist, 8) + 1) % MAX_FRAMES;
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win_end = (curr_frame + 895) % MAX_FRAMES;
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start_frame &= 0x7ff;
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start_frame_id = (start_frame_id >> 3) & 0x7ff;
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end_frame_id = (end_frame_id >> 3) & 0x7ff;
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if (start_frame_id < end_frame_id) {
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if (start_frame > end_frame_id ||
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start_frame < start_frame_id)
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ret = -EINVAL;
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} else if (start_frame_id > end_frame_id) {
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if ((start_frame > end_frame_id &&
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start_frame < start_frame_id))
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ret = -EINVAL;
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/* Is this the first URB starting the whole isoc data flow? */
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if (ep->next_uframe < 0) {
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/* align first URB to next interval boundary, or at last to full frame */
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start_uframe = mfindex + ist + XHCI_CFC_DELAY;
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start_uframe = roundup(start_uframe, 8);
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start_uframe = roundup(start_uframe, uinterval) % MAX_UFRAMES;
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} else {
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ret = -EINVAL;
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}
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/* URB is mid stream and expected to handle the next frame */
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start_uframe = ep->next_uframe;
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urb_start = start_uframe / 8;
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urb_end = (start_uframe + urb->number_of_packets * uinterval) / 8;
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urb_end %= MAX_FRAMES;
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if (index == 0) {
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if (ret == -EINVAL || start_frame == start_frame_id) {
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start_frame = start_frame_id + 1;
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if (urb->dev->speed == USB_SPEED_LOW ||
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urb->dev->speed == USB_SPEED_FULL)
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urb->start_frame = start_frame;
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else
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urb->start_frame = start_frame << 3;
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ret = 0;
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}
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}
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if (!xhci_frame_in_range(urb_start, win_start, win_end))
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xhci_dbg(xhci, "Ill-timed isoc URB %p for start frame %d, range %d-%d\n",
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urb, urb_start, win_start, win_end);
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if (ret) {
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xhci_warn(xhci, "Frame ID %d (reg %d, index %d) beyond range (%d, %d)\n",
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start_frame, current_frame_id, index,
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start_frame_id, end_frame_id);
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xhci_warn(xhci, "Ignore frame ID field, use SIA bit instead\n");
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return ret;
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if (!xhci_frame_in_range(urb_end, win_start, win_end))
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xhci_dbg(xhci, "Ill-timed isoc URB %p for end frame %d, range %d-%d\n",
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urb, urb_start, win_start, win_end);
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}
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/* set urb->start_frame */
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urb->start_frame = frame_unit ? start_uframe / 8 : start_uframe;
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return start_frame;
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return start_uframe;
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}
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/* Check if we should generate event interrupt for a TD in an isoc URB */
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@ -4070,6 +4067,8 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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bool more_trbs_coming;
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struct xhci_virt_ep *xep;
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int frame_id;
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int uinterval = urb->interval;
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int start_uframe;
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xep = &xhci->devs[slot_id]->eps[ep_index];
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ep_ring = xhci->devs[slot_id]->eps[ep_index].ring;
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@ -4085,6 +4084,12 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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start_cycle = ep_ring->cycle_state;
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urb_priv = urb->hcpriv;
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if (urb->dev->speed == USB_SPEED_FULL || urb->dev->speed == USB_SPEED_LOW)
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uinterval = urb->interval * 8;
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start_uframe = xhci_get_isoc_start_frame(xhci, urb, xep);
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/* Queue the TRBs for each TD, even if they are zero-length */
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for (i = 0; i < num_tds; i++) {
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unsigned int total_pkt_count, max_pkt;
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@ -4116,14 +4121,15 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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goto cleanup;
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}
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td = &urb_priv->td[i];
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/* use SIA as default, if frame id is used overwrite it */
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sia_frame_id = TRB_SIA;
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if (!(urb->transfer_flags & URB_ISO_ASAP) &&
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(xhci->hcc_params & HCC_CFC)) {
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frame_id = xhci_get_isoc_frame_id(xhci, urb, i);
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if (frame_id >= 0)
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sia_frame_id = TRB_FRAME_ID(frame_id);
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if (!(urb->transfer_flags & URB_ISO_ASAP) && (xhci->hcc_params & HCC_CFC)) {
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frame_id = (start_uframe + i * uinterval) / 8;
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frame_id %= MAX_FRAMES;
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sia_frame_id = TRB_FRAME_ID(frame_id);
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}
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/*
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* Set isoc specific data for the first TRB in a TD.
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* Prevent HW from getting the TRBs by keeping the cycle state
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@ -4202,9 +4208,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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}
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}
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/* store the next frame id */
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if (xhci->hcc_params & HCC_CFC)
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xep->next_frame_id = urb->start_frame + num_tds * urb->interval;
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xep->next_uframe = (start_uframe + num_tds * uinterval) % MAX_UFRAMES;
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if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
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if (xhci->quirks & XHCI_AMD_PLL_FIX)
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@ -4251,11 +4255,9 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
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struct xhci_virt_device *xdev;
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struct xhci_ring *ep_ring;
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struct xhci_ep_ctx *ep_ctx;
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int start_frame;
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struct xhci_virt_ep *xep;
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int num_tds, num_trbs, i;
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int ret;
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struct xhci_virt_ep *xep;
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int ist;
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xdev = xhci->devs[slot_id];
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xep = &xhci->devs[slot_id]->eps[ep_index];
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@ -4281,38 +4283,12 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags,
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*/
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check_interval(urb, ep_ctx);
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/* Calculate the start frame and put it in urb->start_frame. */
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if ((xhci->hcc_params & HCC_CFC) && !list_empty(&ep_ring->td_list)) {
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if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_RUNNING) {
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urb->start_frame = xep->next_frame_id;
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goto skip_start_over;
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}
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}
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start_frame = readl(&xhci->run_regs->microframe_index);
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start_frame &= 0x3fff;
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/*
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* Round up to the next frame and consider the time before trb really
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* gets scheduled by hardare.
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* Check if this starts the isoc data flow. Relies on hw setting ep ctx
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* state after doorbell ring. Consider adding list_empty(td_list) check
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*/
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ist = xhci_ist_microframes(xhci);
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start_frame += ist + XHCI_CFC_DELAY;
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start_frame = roundup(start_frame, 8);
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/*
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* Round up to the next ESIT (Endpoint Service Interval Time) if ESIT
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* is greate than 8 microframes.
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*/
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if (urb->dev->speed == USB_SPEED_LOW ||
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urb->dev->speed == USB_SPEED_FULL) {
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start_frame = roundup(start_frame, urb->interval << 3);
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urb->start_frame = start_frame >> 3;
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} else {
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start_frame = roundup(start_frame, urb->interval);
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urb->start_frame = start_frame;
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}
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skip_start_over:
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if (GET_EP_CTX_STATE(ep_ctx) != EP_STATE_RUNNING)
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xep->next_uframe = -1;
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return xhci_queue_isoc_tx(xhci, mem_flags, urb, slot_id, ep_index);
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}
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@ -290,6 +290,11 @@ struct xhci_run_regs {
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struct xhci_intr_reg ir_set[1024];
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};
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/* Bits [13:3] of the microframe index equals the 1ms frame index */
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#define MFINDEX_TO_FRAME(p) (((p) >> 3) & 0x7ff)
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#define MAX_FRAMES 2048
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#define MAX_UFRAMES (MAX_FRAMES * 8)
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/**
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* struct doorbell_array
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*
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@ -699,7 +704,7 @@ struct xhci_virt_ep {
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struct list_head bw_endpoint_list;
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unsigned long stop_time;
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/* Isoch Frame ID checking storage */
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int next_frame_id;
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int next_uframe;
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/* Use new Isoch TRB layout needed for extended TBC support */
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bool use_extended_tbc;
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/* set if this endpoint is controlled via sideband access*/
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