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staging: gpib: Add tms9914 GPIB chip driver
Low level Chip driver used on a number of boards. Signed-off-by: Dave Penkler <dpenkler@gmail.com> Link: https://lore.kernel.org/r/20240918121908.19366-7-dpenkler@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Dave Penkler
Greg Kroah-Hartman
parent
9dde4559e9
commit
add452d09a
6
drivers/staging/gpib/tms9914/Makefile
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6
drivers/staging/gpib/tms9914/Makefile
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@ -0,0 +1,6 @@
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obj-m += tms9914.o
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910
drivers/staging/gpib/tms9914/tms9914.c
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910
drivers/staging/gpib/tms9914/tms9914.c
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@ -0,0 +1,910 @@
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// SPDX-License-Identifier: GPL-2.0
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/***************************************************************************
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* copyright : (C) 2001, 2002 by Frank Mori Hess
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***************************************************************************/
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <asm/dma.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include "gpibP.h"
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#include "tms9914.h"
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MODULE_LICENSE("GPL");
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static unsigned int update_status_nolock(gpib_board_t *board, struct tms9914_priv *priv);
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int tms9914_take_control(gpib_board_t *board, struct tms9914_priv *priv, int synchronous)
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{
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int i;
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const int timeout = 100;
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if (synchronous)
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write_byte(priv, AUX_TCS, AUXCR);
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else
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write_byte(priv, AUX_TCA, AUXCR);
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// busy wait until ATN is asserted
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for (i = 0; i < timeout; i++) {
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if ((read_byte(priv, ADSR) & HR_ATN))
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break;
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udelay(1);
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}
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if (i == timeout)
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return -ETIMEDOUT;
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clear_bit(WRITE_READY_BN, &priv->state);
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return 0;
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}
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EXPORT_SYMBOL_GPL(tms9914_take_control);
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/* The agilent 82350B has a buggy implementation of tcs which interferes with the
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* operation of tca. It appears to be based on the controller state machine
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* described in the TI 9900 TMS9914A data manual published in 1982. This
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* manual describes tcs as putting the controller into a CWAS
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* state where it waits indefinitely for ANRS and ignores tca. Since a
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* functioning tca is far more important than tcs, we work around the
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* problem by never issuing tcs.
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*
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* I don't know if this problem exists in the real tms9914a or just in the fpga
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* of the 82350B. For now, only the agilent_82350b uses this workaround.
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* The rest of the tms9914 based drivers still use tms9914_take_control
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* directly (which does issue tcs).
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*/
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int tms9914_take_control_workaround(gpib_board_t *board, struct tms9914_priv *priv, int synchronous)
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{
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if (synchronous)
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return -ETIMEDOUT;
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return tms9914_take_control(board, priv, synchronous);
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}
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EXPORT_SYMBOL_GPL(tms9914_take_control_workaround);
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int tms9914_go_to_standby(gpib_board_t *board, struct tms9914_priv *priv)
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{
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int i;
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const int timeout = 1000;
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write_byte(priv, AUX_GTS, AUXCR);
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// busy wait until ATN is released
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for (i = 0; i < timeout; i++) {
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if ((read_byte(priv, ADSR) & HR_ATN) == 0)
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break;
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udelay(1);
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}
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if (i == timeout) {
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pr_err("error waiting for NATN\n");
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return -ETIMEDOUT;
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}
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clear_bit(COMMAND_READY_BN, &priv->state);
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return 0;
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}
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EXPORT_SYMBOL_GPL(tms9914_go_to_standby);
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void tms9914_interface_clear(gpib_board_t *board, struct tms9914_priv *priv, int assert)
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{
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if (assert) {
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write_byte(priv, AUX_SIC | AUX_CS, AUXCR);
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set_bit(CIC_NUM, &board->status);
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} else {
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write_byte(priv, AUX_SIC, AUXCR);
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}
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}
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EXPORT_SYMBOL_GPL(tms9914_interface_clear);
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void tms9914_remote_enable(gpib_board_t *board, struct tms9914_priv *priv, int enable)
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{
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if (enable)
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write_byte(priv, AUX_SRE | AUX_CS, AUXCR);
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else
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write_byte(priv, AUX_SRE, AUXCR);
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}
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EXPORT_SYMBOL_GPL(tms9914_remote_enable);
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void tms9914_request_system_control(gpib_board_t *board, struct tms9914_priv *priv,
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int request_control)
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{
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if (request_control) {
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write_byte(priv, AUX_RQC, AUXCR);
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} else {
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clear_bit(CIC_NUM, &board->status);
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write_byte(priv, AUX_RLC, AUXCR);
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}
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}
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EXPORT_SYMBOL_GPL(tms9914_request_system_control);
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unsigned int tms9914_t1_delay(gpib_board_t *board, struct tms9914_priv *priv,
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unsigned int nano_sec)
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{
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static const int clock_period = 200; // assuming 5Mhz input clock
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int num_cycles;
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num_cycles = 12;
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if (nano_sec <= 8 * clock_period) {
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write_byte(priv, AUX_STDL | AUX_CS, AUXCR);
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num_cycles = 8;
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} else {
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write_byte(priv, AUX_STDL, AUXCR);
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}
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if (nano_sec <= 4 * clock_period) {
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write_byte(priv, AUX_VSTDL | AUX_CS, AUXCR);
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num_cycles = 4;
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} else {
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write_byte(priv, AUX_VSTDL, AUXCR);
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}
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return num_cycles * clock_period;
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}
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EXPORT_SYMBOL_GPL(tms9914_t1_delay);
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void tms9914_return_to_local(const gpib_board_t *board, struct tms9914_priv *priv)
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{
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write_byte(priv, AUX_RTL, AUXCR);
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}
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EXPORT_SYMBOL_GPL(tms9914_return_to_local);
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void tms9914_set_holdoff_mode(struct tms9914_priv *priv, enum tms9914_holdoff_mode mode)
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{
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switch (mode) {
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case TMS9914_HOLDOFF_NONE:
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write_byte(priv, AUX_HLDE, AUXCR);
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write_byte(priv, AUX_HLDA, AUXCR);
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break;
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case TMS9914_HOLDOFF_EOI:
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write_byte(priv, AUX_HLDE | AUX_CS, AUXCR);
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write_byte(priv, AUX_HLDA, AUXCR);
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break;
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case TMS9914_HOLDOFF_ALL:
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write_byte(priv, AUX_HLDE, AUXCR);
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write_byte(priv, AUX_HLDA | AUX_CS, AUXCR);
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break;
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default:
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pr_err("%s: bug! bad holdoff mode %i\n", __func__, mode);
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break;
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}
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priv->holdoff_mode = mode;
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}
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EXPORT_SYMBOL_GPL(tms9914_set_holdoff_mode);
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void tms9914_release_holdoff(struct tms9914_priv *priv)
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{
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if (priv->holdoff_active) {
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write_byte(priv, AUX_RHDF, AUXCR);
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priv->holdoff_active = 0;
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}
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}
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EXPORT_SYMBOL_GPL(tms9914_release_holdoff);
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int tms9914_enable_eos(gpib_board_t *board, struct tms9914_priv *priv, uint8_t eos_byte,
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int compare_8_bits)
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{
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priv->eos = eos_byte;
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priv->eos_flags = REOS;
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if (compare_8_bits)
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priv->eos_flags |= BIN;
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return 0;
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}
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EXPORT_SYMBOL(tms9914_enable_eos);
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void tms9914_disable_eos(gpib_board_t *board, struct tms9914_priv *priv)
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{
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priv->eos_flags &= ~REOS;
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}
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EXPORT_SYMBOL(tms9914_disable_eos);
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int tms9914_parallel_poll(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *result)
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{
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// execute parallel poll
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write_byte(priv, AUX_CS | AUX_RPP, AUXCR);
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udelay(2);
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*result = read_byte(priv, CPTR);
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// clear parallel poll state
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write_byte(priv, AUX_RPP, AUXCR);
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return 0;
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}
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EXPORT_SYMBOL(tms9914_parallel_poll);
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static void set_ppoll_reg(struct tms9914_priv *priv, int enable,
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unsigned int dio_line, int sense, int ist)
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{
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u8 dio_byte;
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if (enable && ((sense && ist) || (!sense && !ist))) {
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dio_byte = 1 << (dio_line - 1);
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write_byte(priv, dio_byte, PPR);
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} else {
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write_byte(priv, 0, PPR);
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}
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}
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void tms9914_parallel_poll_configure(gpib_board_t *board,
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struct tms9914_priv *priv, uint8_t config)
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{
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priv->ppoll_enable = (config & PPC_DISABLE) == 0;
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priv->ppoll_line = (config & PPC_DIO_MASK) + 1;
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priv->ppoll_sense = (config & PPC_SENSE) != 0;
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set_ppoll_reg(priv, priv->ppoll_enable, priv->ppoll_line, priv->ppoll_sense, board->ist);
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}
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EXPORT_SYMBOL(tms9914_parallel_poll_configure);
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void tms9914_parallel_poll_response(gpib_board_t *board,
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struct tms9914_priv *priv, int ist)
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{
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set_ppoll_reg(priv, priv->ppoll_enable, priv->ppoll_line, priv->ppoll_sense, ist);
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}
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EXPORT_SYMBOL(tms9914_parallel_poll_response);
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void tms9914_serial_poll_response(gpib_board_t *board, struct tms9914_priv *priv, uint8_t status)
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{
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unsigned long flags;
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spin_lock_irqsave(&board->spinlock, flags);
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write_byte(priv, status, SPMR);
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priv->spoll_status = status;
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if (status & request_service_bit)
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write_byte(priv, AUX_RSV2 | AUX_CS, AUXCR);
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else
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write_byte(priv, AUX_RSV2, AUXCR);
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spin_unlock_irqrestore(&board->spinlock, flags);
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}
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EXPORT_SYMBOL(tms9914_serial_poll_response);
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uint8_t tms9914_serial_poll_status(gpib_board_t *board, struct tms9914_priv *priv)
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{
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u8 status;
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unsigned long flags;
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spin_lock_irqsave(&board->spinlock, flags);
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status = priv->spoll_status;
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spin_unlock_irqrestore(&board->spinlock, flags);
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return status;
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}
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EXPORT_SYMBOL(tms9914_serial_poll_status);
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int tms9914_primary_address(gpib_board_t *board, struct tms9914_priv *priv, unsigned int address)
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{
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// put primary address in address0
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write_byte(priv, address & ADDRESS_MASK, ADR);
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return 0;
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}
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EXPORT_SYMBOL(tms9914_primary_address);
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int tms9914_secondary_address(gpib_board_t *board, struct tms9914_priv *priv,
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unsigned int address, int enable)
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{
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if (enable)
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priv->imr1_bits |= HR_APTIE;
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else
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priv->imr1_bits &= ~HR_APTIE;
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write_byte(priv, priv->imr1_bits, IMR1);
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return 0;
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}
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EXPORT_SYMBOL(tms9914_secondary_address);
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unsigned int tms9914_update_status(gpib_board_t *board, struct tms9914_priv *priv,
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unsigned int clear_mask)
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{
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unsigned long flags;
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unsigned int retval;
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spin_lock_irqsave(&board->spinlock, flags);
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retval = update_status_nolock(board, priv);
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board->status &= ~clear_mask;
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spin_unlock_irqrestore(&board->spinlock, flags);
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return retval;
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}
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EXPORT_SYMBOL(tms9914_update_status);
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static void update_talker_state(struct tms9914_priv *priv, unsigned int address_status_bits)
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{
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if (address_status_bits & HR_TA) {
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if (address_status_bits & HR_ATN)
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priv->talker_state = talker_addressed;
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else
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/* this could also be serial_poll_active, but the tms9914 provides no
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* way to distinguish, so we'll assume talker_active
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*/
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priv->talker_state = talker_active;
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} else {
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priv->talker_state = talker_idle;
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}
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}
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static void update_listener_state(struct tms9914_priv *priv, unsigned int address_status_bits)
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{
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if (address_status_bits & HR_LA) {
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if (address_status_bits & HR_ATN)
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priv->listener_state = listener_addressed;
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else
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priv->listener_state = listener_active;
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} else {
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priv->listener_state = listener_idle;
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}
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}
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static unsigned int update_status_nolock(gpib_board_t *board, struct tms9914_priv *priv)
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{
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int address_status;
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int bsr_bits;
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address_status = read_byte(priv, ADSR);
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// check for remote/local
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if (address_status & HR_REM)
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set_bit(REM_NUM, &board->status);
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else
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clear_bit(REM_NUM, &board->status);
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// check for lockout
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if (address_status & HR_LLO)
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set_bit(LOK_NUM, &board->status);
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else
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clear_bit(LOK_NUM, &board->status);
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// check for ATN
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if (address_status & HR_ATN)
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set_bit(ATN_NUM, &board->status);
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else
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clear_bit(ATN_NUM, &board->status);
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// check for talker/listener addressed
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update_talker_state(priv, address_status);
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if (priv->talker_state == talker_active || priv->talker_state == talker_addressed)
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set_bit(TACS_NUM, &board->status);
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else
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clear_bit(TACS_NUM, &board->status);
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update_listener_state(priv, address_status);
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if (priv->listener_state == listener_active || priv->listener_state == listener_addressed)
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set_bit(LACS_NUM, &board->status);
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else
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clear_bit(LACS_NUM, &board->status);
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// Check for SRQI - not reset elsewhere except in autospoll
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if (board->status & SRQI) {
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bsr_bits = read_byte(priv, BSR);
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if (!(bsr_bits & BSR_SRQ_BIT))
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clear_bit(SRQI_NUM, &board->status);
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}
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GPIB_DPRINTK("status 0x%lx, state 0x%lx\n", board->status, priv->state);
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return board->status;
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}
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int tms9914_line_status(const gpib_board_t *board, struct tms9914_priv *priv)
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{
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int bsr_bits;
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int status = ValidALL;
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bsr_bits = read_byte(priv, BSR);
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if (bsr_bits & BSR_REN_BIT)
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status |= BusREN;
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if (bsr_bits & BSR_IFC_BIT)
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status |= BusIFC;
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if (bsr_bits & BSR_SRQ_BIT)
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status |= BusSRQ;
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if (bsr_bits & BSR_EOI_BIT)
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status |= BusEOI;
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if (bsr_bits & BSR_NRFD_BIT)
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status |= BusNRFD;
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if (bsr_bits & BSR_NDAC_BIT)
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status |= BusNDAC;
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if (bsr_bits & BSR_DAV_BIT)
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status |= BusDAV;
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if (bsr_bits & BSR_ATN_BIT)
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status |= BusATN;
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return status;
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}
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EXPORT_SYMBOL(tms9914_line_status);
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static int check_for_eos(struct tms9914_priv *priv, uint8_t byte)
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{
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static const u8 seven_bit_compare_mask = 0x7f;
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if ((priv->eos_flags & REOS) == 0)
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return 0;
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if (priv->eos_flags & BIN) {
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if (priv->eos == byte)
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return 1;
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} else {
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if ((priv->eos & seven_bit_compare_mask) == (byte & seven_bit_compare_mask))
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return 1;
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}
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return 0;
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}
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static int wait_for_read_byte(gpib_board_t *board, struct tms9914_priv *priv)
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{
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if (wait_event_interruptible(board->wait,
|
||||
test_bit(READ_READY_BN, &priv->state) ||
|
||||
test_bit(DEV_CLEAR_BN, &priv->state) ||
|
||||
test_bit(TIMO_NUM, &board->status))) {
|
||||
pr_debug("gpib: pio read wait interrupted\n");
|
||||
return -ERESTARTSYS;
|
||||
};
|
||||
if (test_bit(TIMO_NUM, &board->status))
|
||||
return -ETIMEDOUT;
|
||||
|
||||
if (test_bit(DEV_CLEAR_BN, &priv->state))
|
||||
return -EINTR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline uint8_t tms9914_read_data_in(gpib_board_t *board, struct tms9914_priv *priv, int *end)
|
||||
{
|
||||
unsigned long flags;
|
||||
u8 data;
|
||||
|
||||
spin_lock_irqsave(&board->spinlock, flags);
|
||||
clear_bit(READ_READY_BN, &priv->state);
|
||||
data = read_byte(priv, DIR);
|
||||
if (test_and_clear_bit(RECEIVED_END_BN, &priv->state))
|
||||
*end = 1;
|
||||
else
|
||||
*end = 0;
|
||||
switch (priv->holdoff_mode) {
|
||||
case TMS9914_HOLDOFF_EOI:
|
||||
if (*end)
|
||||
priv->holdoff_active = 1;
|
||||
break;
|
||||
case TMS9914_HOLDOFF_ALL:
|
||||
priv->holdoff_active = 1;
|
||||
break;
|
||||
case TMS9914_HOLDOFF_NONE:
|
||||
break;
|
||||
default:
|
||||
pr_err("%s: bug! bad holdoff mode %i\n", __func__, priv->holdoff_mode);
|
||||
break;
|
||||
};
|
||||
spin_unlock_irqrestore(&board->spinlock, flags);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
static int pio_read(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *buffer,
|
||||
size_t length, int *end, size_t *bytes_read)
|
||||
{
|
||||
ssize_t retval = 0;
|
||||
|
||||
*bytes_read = 0;
|
||||
*end = 0;
|
||||
while (*bytes_read < length && *end == 0) {
|
||||
tms9914_release_holdoff(priv);
|
||||
retval = wait_for_read_byte(board, priv);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
buffer[(*bytes_read)++] = tms9914_read_data_in(board, priv, end);
|
||||
|
||||
if (check_for_eos(priv, buffer[*bytes_read - 1]))
|
||||
*end = 1;
|
||||
}
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
int tms9914_read(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *buffer,
|
||||
size_t length, int *end, size_t *bytes_read)
|
||||
{
|
||||
ssize_t retval = 0;
|
||||
size_t num_bytes;
|
||||
|
||||
*end = 0;
|
||||
*bytes_read = 0;
|
||||
if (length == 0)
|
||||
return 0;
|
||||
|
||||
clear_bit(DEV_CLEAR_BN, &priv->state);
|
||||
|
||||
// transfer data (except for last byte)
|
||||
if (length > 1) {
|
||||
if (priv->eos_flags & REOS)
|
||||
tms9914_set_holdoff_mode(priv, TMS9914_HOLDOFF_ALL);
|
||||
else
|
||||
tms9914_set_holdoff_mode(priv, TMS9914_HOLDOFF_EOI);
|
||||
// PIO transfer
|
||||
retval = pio_read(board, priv, buffer, length - 1, end, &num_bytes);
|
||||
*bytes_read += num_bytes;
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
buffer += num_bytes;
|
||||
length -= num_bytes;
|
||||
}
|
||||
// read last bytes if we havn't received an END yet
|
||||
if (*end == 0) {
|
||||
// make sure we holdoff after last byte read
|
||||
tms9914_set_holdoff_mode(priv, TMS9914_HOLDOFF_ALL);
|
||||
retval = pio_read(board, priv, buffer, length, end, &num_bytes);
|
||||
*bytes_read += num_bytes;
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(tms9914_read);
|
||||
|
||||
static int pio_write_wait(gpib_board_t *board, struct tms9914_priv *priv)
|
||||
{
|
||||
// wait until next byte is ready to be sent
|
||||
if (wait_event_interruptible(board->wait,
|
||||
test_bit(WRITE_READY_BN, &priv->state) ||
|
||||
test_bit(BUS_ERROR_BN, &priv->state) ||
|
||||
test_bit(DEV_CLEAR_BN, &priv->state) ||
|
||||
test_bit(TIMO_NUM, &board->status))) {
|
||||
GPIB_DPRINTK("gpib write interrupted!\n");
|
||||
return -ERESTARTSYS;
|
||||
}
|
||||
if (test_bit(TIMO_NUM, &board->status))
|
||||
return -ETIMEDOUT;
|
||||
if (test_bit(BUS_ERROR_BN, &priv->state))
|
||||
return -EIO;
|
||||
if (test_bit(DEV_CLEAR_BN, &priv->state))
|
||||
return -EINTR;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pio_write(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *buffer,
|
||||
size_t length, size_t *bytes_written)
|
||||
{
|
||||
ssize_t retval = 0;
|
||||
unsigned long flags;
|
||||
|
||||
*bytes_written = 0;
|
||||
while (*bytes_written < length) {
|
||||
retval = pio_write_wait(board, priv);
|
||||
if (retval < 0)
|
||||
break;
|
||||
|
||||
spin_lock_irqsave(&board->spinlock, flags);
|
||||
clear_bit(WRITE_READY_BN, &priv->state);
|
||||
write_byte(priv, buffer[(*bytes_written)++], CDOR);
|
||||
spin_unlock_irqrestore(&board->spinlock, flags);
|
||||
}
|
||||
retval = pio_write_wait(board, priv);
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
int tms9914_write(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *buffer, size_t length,
|
||||
int send_eoi, size_t *bytes_written)
|
||||
{
|
||||
ssize_t retval = 0;
|
||||
|
||||
*bytes_written = 0;
|
||||
if (length == 0)
|
||||
return 0;
|
||||
|
||||
clear_bit(BUS_ERROR_BN, &priv->state);
|
||||
clear_bit(DEV_CLEAR_BN, &priv->state);
|
||||
|
||||
if (send_eoi)
|
||||
length-- ; /* save the last byte for sending EOI */
|
||||
|
||||
if (length > 0) {
|
||||
size_t num_bytes;
|
||||
// PIO transfer
|
||||
retval = pio_write(board, priv, buffer, length, &num_bytes);
|
||||
*bytes_written += num_bytes;
|
||||
if (retval < 0)
|
||||
return retval;
|
||||
}
|
||||
if (send_eoi) {
|
||||
size_t num_bytes;
|
||||
/*send EOI */
|
||||
write_byte(priv, AUX_SEOI, AUXCR);
|
||||
|
||||
retval = pio_write(board, priv, &buffer[*bytes_written], 1, &num_bytes);
|
||||
*bytes_written += num_bytes;
|
||||
}
|
||||
return retval;
|
||||
}
|
||||
EXPORT_SYMBOL(tms9914_write);
|
||||
|
||||
static void check_my_address_state(gpib_board_t *board, struct tms9914_priv *priv, int cmd_byte)
|
||||
{
|
||||
if (cmd_byte == MLA(board->pad)) {
|
||||
priv->primary_listen_addressed = 1;
|
||||
// become active listener
|
||||
if (board->sad < 0)
|
||||
write_byte(priv, AUX_LON | AUX_CS, AUXCR);
|
||||
} else if (board->sad >= 0 && priv->primary_listen_addressed &&
|
||||
cmd_byte == MSA(board->sad)) {
|
||||
// become active listener
|
||||
write_byte(priv, AUX_LON | AUX_CS, AUXCR);
|
||||
} else if (cmd_byte != MLA(board->pad) && (cmd_byte & 0xe0) == LAD) {
|
||||
priv->primary_listen_addressed = 0;
|
||||
} else if (cmd_byte == UNL) {
|
||||
priv->primary_listen_addressed = 0;
|
||||
write_byte(priv, AUX_LON, AUXCR);
|
||||
} else if (cmd_byte == MTA(board->pad)) {
|
||||
priv->primary_talk_addressed = 1;
|
||||
if (board->sad < 0)
|
||||
//make active talker
|
||||
write_byte(priv, AUX_TON | AUX_CS, AUXCR);
|
||||
} else if (board->sad >= 0 && priv->primary_talk_addressed &&
|
||||
cmd_byte == MSA(board->sad)) {
|
||||
// become active talker
|
||||
write_byte(priv, AUX_TON | AUX_CS, AUXCR);
|
||||
} else if (cmd_byte != MTA(board->pad) && (cmd_byte & 0xe0) == TAD) {
|
||||
// Other Talk Address
|
||||
priv->primary_talk_addressed = 0;
|
||||
write_byte(priv, AUX_TON, AUXCR);
|
||||
} else if (cmd_byte == UNT) {
|
||||
priv->primary_talk_addressed = 0;
|
||||
write_byte(priv, AUX_TON, AUXCR);
|
||||
}
|
||||
}
|
||||
|
||||
int tms9914_command(gpib_board_t *board, struct tms9914_priv *priv, uint8_t *buffer,
|
||||
size_t length, size_t *bytes_written)
|
||||
{
|
||||
int retval = 0;
|
||||
unsigned long flags;
|
||||
|
||||
*bytes_written = 0;
|
||||
while (*bytes_written < length) {
|
||||
if (wait_event_interruptible(board->wait,
|
||||
test_bit(COMMAND_READY_BN,
|
||||
&priv->state) ||
|
||||
test_bit(TIMO_NUM, &board->status))) {
|
||||
pr_debug("gpib command wait interrupted\n");
|
||||
break;
|
||||
}
|
||||
if (test_bit(TIMO_NUM, &board->status))
|
||||
break;
|
||||
|
||||
spin_lock_irqsave(&board->spinlock, flags);
|
||||
clear_bit(COMMAND_READY_BN, &priv->state);
|
||||
write_byte(priv, buffer[*bytes_written], CDOR);
|
||||
spin_unlock_irqrestore(&board->spinlock, flags);
|
||||
|
||||
check_my_address_state(board, priv, buffer[*bytes_written]);
|
||||
|
||||
++(*bytes_written);
|
||||
}
|
||||
// wait until last command byte is written
|
||||
if (wait_event_interruptible(board->wait,
|
||||
test_bit(COMMAND_READY_BN,
|
||||
&priv->state) || test_bit(TIMO_NUM, &board->status)))
|
||||
retval = -ERESTARTSYS;
|
||||
if (test_bit(TIMO_NUM, &board->status))
|
||||
retval = -ETIMEDOUT;
|
||||
|
||||
return retval;
|
||||
}
|
||||
EXPORT_SYMBOL(tms9914_command);
|
||||
|
||||
irqreturn_t tms9914_interrupt(gpib_board_t *board, struct tms9914_priv *priv)
|
||||
{
|
||||
int status0, status1;
|
||||
|
||||
// read interrupt status (also clears status)
|
||||
status0 = read_byte(priv, ISR0);
|
||||
status1 = read_byte(priv, ISR1);
|
||||
return tms9914_interrupt_have_status(board, priv, status0, status1);
|
||||
}
|
||||
EXPORT_SYMBOL(tms9914_interrupt);
|
||||
|
||||
irqreturn_t tms9914_interrupt_have_status(gpib_board_t *board, struct tms9914_priv *priv,
|
||||
int status0, int status1)
|
||||
{
|
||||
// record reception of END
|
||||
if (status0 & HR_END)
|
||||
set_bit(RECEIVED_END_BN, &priv->state);
|
||||
// get incoming data in PIO mode
|
||||
if ((status0 & HR_BI))
|
||||
set_bit(READ_READY_BN, &priv->state);
|
||||
if ((status0 & HR_BO)) {
|
||||
if (read_byte(priv, ADSR) & HR_ATN)
|
||||
set_bit(COMMAND_READY_BN, &priv->state);
|
||||
else
|
||||
set_bit(WRITE_READY_BN, &priv->state);
|
||||
}
|
||||
|
||||
if (status0 & HR_SPAS) {
|
||||
priv->spoll_status &= ~request_service_bit;
|
||||
write_byte(priv, priv->spoll_status, SPMR);
|
||||
//FIXME: set SPOLL status bit
|
||||
}
|
||||
// record service request in status
|
||||
if (status1 & HR_SRQ)
|
||||
set_bit(SRQI_NUM, &board->status);
|
||||
// have been addressed (with secondary addressing disabled)
|
||||
if (status1 & HR_MA)
|
||||
// clear dac holdoff
|
||||
write_byte(priv, AUX_VAL, AUXCR);
|
||||
// unrecognized command received
|
||||
if (status1 & HR_UNC) {
|
||||
unsigned short command_byte = read_byte(priv, CPTR) & gpib_command_mask;
|
||||
|
||||
switch (command_byte) {
|
||||
case PPConfig:
|
||||
priv->ppoll_configure_state = 1;
|
||||
/* AUX_PTS generates another UNC interrupt on the next command byte
|
||||
* if it is in the secondary address group (such as PPE and PPD).
|
||||
*/
|
||||
write_byte(priv, AUX_PTS, AUXCR);
|
||||
write_byte(priv, AUX_VAL, AUXCR);
|
||||
break;
|
||||
case PPU:
|
||||
tms9914_parallel_poll_configure(board, priv, command_byte);
|
||||
write_byte(priv, AUX_VAL, AUXCR);
|
||||
break;
|
||||
default:
|
||||
if (is_PPE(command_byte) || is_PPD(command_byte)) {
|
||||
if (priv->ppoll_configure_state) {
|
||||
tms9914_parallel_poll_configure(board, priv, command_byte);
|
||||
write_byte(priv, AUX_VAL, AUXCR);
|
||||
} else {// bad parallel poll configure byte
|
||||
// clear dac holdoff
|
||||
write_byte(priv, AUX_INVAL, AUXCR);
|
||||
}
|
||||
} else {
|
||||
// printk("tms9914: unrecognized gpib command pass thru 0x%x\n",
|
||||
// command_byte);
|
||||
// clear dac holdoff
|
||||
write_byte(priv, AUX_INVAL, AUXCR);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if (in_primary_command_group(command_byte) && command_byte != PPConfig)
|
||||
priv->ppoll_configure_state = 0;
|
||||
}
|
||||
|
||||
if (status1 & HR_ERR) {
|
||||
GPIB_DPRINTK("gpib bus error\n");
|
||||
set_bit(BUS_ERROR_BN, &priv->state);
|
||||
}
|
||||
|
||||
if (status1 & HR_IFC) {
|
||||
push_gpib_event(board, EventIFC);
|
||||
clear_bit(CIC_NUM, &board->status);
|
||||
}
|
||||
|
||||
if (status1 & HR_GET) {
|
||||
push_gpib_event(board, EventDevTrg);
|
||||
// clear dac holdoff
|
||||
write_byte(priv, AUX_VAL, AUXCR);
|
||||
}
|
||||
|
||||
if (status1 & HR_DCAS) {
|
||||
push_gpib_event(board, EventDevClr);
|
||||
// clear dac holdoff
|
||||
write_byte(priv, AUX_VAL, AUXCR);
|
||||
set_bit(DEV_CLEAR_BN, &priv->state);
|
||||
}
|
||||
|
||||
// check for being addressed with secondary addressing
|
||||
if (status1 & HR_APT) {
|
||||
if (board->sad < 0)
|
||||
pr_err("tms9914: bug, APT interrupt without secondary addressing?\n");
|
||||
if ((read_byte(priv, CPTR) & gpib_command_mask) == MSA(board->sad))
|
||||
write_byte(priv, AUX_VAL, AUXCR);
|
||||
else
|
||||
write_byte(priv, AUX_INVAL, AUXCR);
|
||||
}
|
||||
|
||||
if ((status0 & priv->imr0_bits) || (status1 & priv->imr1_bits)) {
|
||||
// GPIB_DPRINTK("isr0 0x%x, imr0 0x%x, isr1 0x%x, imr1 0x%x\n",
|
||||
// status0, priv->imr0_bits, status1, priv->imr1_bits);
|
||||
update_status_nolock(board, priv);
|
||||
wake_up_interruptible(&board->wait);
|
||||
}
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
EXPORT_SYMBOL(tms9914_interrupt_have_status);
|
||||
|
||||
// size of modbus pci memory io region
|
||||
static const int iomem_size = 0x2000;
|
||||
|
||||
void tms9914_board_reset(struct tms9914_priv *priv)
|
||||
{
|
||||
/* chip reset */
|
||||
write_byte(priv, AUX_CHIP_RESET | AUX_CS, AUXCR);
|
||||
|
||||
/* disable all interrupts */
|
||||
priv->imr0_bits = 0;
|
||||
write_byte(priv, priv->imr0_bits, IMR0);
|
||||
priv->imr1_bits = 0;
|
||||
write_byte(priv, priv->imr1_bits, IMR1);
|
||||
write_byte(priv, AUX_DAI | AUX_CS, AUXCR);
|
||||
|
||||
/* clear registers by reading */
|
||||
read_byte(priv, CPTR);
|
||||
read_byte(priv, ISR0);
|
||||
read_byte(priv, ISR1);
|
||||
|
||||
write_byte(priv, 0, SPMR);
|
||||
|
||||
/* parallel poll unconfigure */
|
||||
write_byte(priv, 0, PPR);
|
||||
// request for data holdoff
|
||||
tms9914_set_holdoff_mode(priv, TMS9914_HOLDOFF_ALL);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tms9914_board_reset);
|
||||
|
||||
void tms9914_online(gpib_board_t *board, struct tms9914_priv *priv)
|
||||
{
|
||||
/* set GPIB address */
|
||||
tms9914_primary_address(board, priv, board->pad);
|
||||
tms9914_secondary_address(board, priv, board->sad, board->sad >= 0);
|
||||
|
||||
// enable tms9914 interrupts
|
||||
priv->imr0_bits |= HR_MACIE | HR_RLCIE | HR_ENDIE | HR_BOIE | HR_BIIE |
|
||||
HR_SPASIE;
|
||||
priv->imr1_bits |= HR_MAIE | HR_SRQIE | HR_UNCIE | HR_ERRIE | HR_IFCIE |
|
||||
HR_GETIE | HR_DCASIE;
|
||||
write_byte(priv, priv->imr0_bits, IMR0);
|
||||
write_byte(priv, priv->imr1_bits, IMR1);
|
||||
write_byte(priv, AUX_DAI, AUXCR);
|
||||
|
||||
// turn off reset state
|
||||
write_byte(priv, AUX_CHIP_RESET, AUXCR);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tms9914_online);
|
||||
|
||||
// wrapper for inb
|
||||
uint8_t tms9914_ioport_read_byte(struct tms9914_priv *priv, unsigned int register_num)
|
||||
{
|
||||
return inb((unsigned long)(priv->iobase) + register_num * priv->offset);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tms9914_ioport_read_byte);
|
||||
|
||||
// wrapper for outb
|
||||
void tms9914_ioport_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
|
||||
{
|
||||
outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset);
|
||||
if (register_num == AUXCR)
|
||||
udelay(1);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tms9914_ioport_write_byte);
|
||||
|
||||
// wrapper for readb
|
||||
uint8_t tms9914_iomem_read_byte(struct tms9914_priv *priv, unsigned int register_num)
|
||||
{
|
||||
return readb(priv->iobase + register_num * priv->offset);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tms9914_iomem_read_byte);
|
||||
|
||||
// wrapper for writeb
|
||||
void tms9914_iomem_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
|
||||
{
|
||||
writeb(data, priv->iobase + register_num * priv->offset);
|
||||
if (register_num == AUXCR)
|
||||
udelay(1);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(tms9914_iomem_write_byte);
|
||||
|
||||
static int __init tms9914_init_module(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit tms9914_exit_module(void)
|
||||
{
|
||||
}
|
||||
|
||||
module_init(tms9914_init_module);
|
||||
module_exit(tms9914_exit_module);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user