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arm64: dts: exynos2200: use 32-bit address space for /soc
All peripherals on this SoC are mapped under the 32-bit address space (0x0 -> 0x20000000), so enforce that. Suggested-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20250815070500.3275491-3-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
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1219992e16
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ad8ea30db8
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@ -221,22 +221,22 @@ psci {
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method = "smc";
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};
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soc {
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soc@0 {
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compatible = "simple-bus";
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ranges;
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ranges = <0x0 0x0 0x0 0x20000000>;
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#address-cells = <2>;
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#size-cells = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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chipid@10000000 {
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compatible = "samsung,exynos2200-chipid",
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"samsung,exynos850-chipid";
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reg = <0x0 0x10000000 0x0 0x24>;
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reg = <0x10000000 0x24>;
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};
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cmu_peris: clock-controller@10020000 {
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compatible = "samsung,exynos2200-cmu-peris";
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reg = <0x0 0x10020000 0x0 0x8000>;
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reg = <0x10020000 0x8000>;
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#clock-cells = <1>;
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clocks = <&cmu_top CLK_DOUT_TCXO_DIV3>,
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@ -250,7 +250,7 @@ cmu_peris: clock-controller@10020000 {
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mct_peris: timer@10040000 {
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compatible = "samsung,exynos2200-mct-peris",
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"samsung,exynos4210-mct";
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reg = <0x0 0x10040000 0x0 0x800>;
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reg = <0x10040000 0x800>;
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clocks = <&cmu_top CLK_DOUT_TCXO_DIV3>, <&cmu_peris CLK_MOUT_PERIS_GIC>;
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clock-names = "fin_pll", "mct";
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interrupts = <GIC_SPI 943 IRQ_TYPE_LEVEL_HIGH 0>,
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@ -270,8 +270,8 @@ mct_peris: timer@10040000 {
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gic: interrupt-controller@10200000 {
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compatible = "arm,gic-v3";
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reg = <0x0 0x10200000 0x0 0x10000>, /* GICD */
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<0x0 0x10240000 0x0 0x200000>; /* GICR * 8 */
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reg = <0x10200000 0x10000>, /* GICD */
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<0x10240000 0x200000>; /* GICR * 8 */
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#interrupt-cells = <4>;
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interrupt-controller;
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@ -294,7 +294,7 @@ ppi_cluster2: interrupt-partition-2 {
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cmu_peric0: clock-controller@10400000 {
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compatible = "samsung,exynos2200-cmu-peric0";
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reg = <0x0 0x10400000 0x0 0x8000>;
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reg = <0x10400000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>,
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@ -306,17 +306,17 @@ cmu_peric0: clock-controller@10400000 {
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syscon_peric0: syscon@10420000 {
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compatible = "samsung,exynos2200-peric0-sysreg", "syscon";
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reg = <0x0 0x10420000 0x0 0x2000>;
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reg = <0x10420000 0x2000>;
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};
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pinctrl_peric0: pinctrl@10430000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x10430000 0x0 0x1000>;
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reg = <0x10430000 0x1000>;
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};
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cmu_peric1: clock-controller@10700000 {
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compatible = "samsung,exynos2200-cmu-peric1";
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reg = <0x0 0x10700000 0x0 0x8000>;
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reg = <0x10700000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>,
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@ -328,23 +328,23 @@ cmu_peric1: clock-controller@10700000 {
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syscon_peric1: syscon@10720000 {
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compatible = "samsung,exynos2200-peric1-sysreg", "syscon";
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reg = <0x0 0x10720000 0x0 0x2000>;
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reg = <0x10720000 0x2000>;
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};
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pinctrl_peric1: pinctrl@10730000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x10730000 0x0 0x1000>;
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reg = <0x10730000 0x1000>;
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};
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cmu_hsi0: clock-controller@10a00000 {
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compatible = "samsung,exynos2200-cmu-hsi0";
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reg = <0x0 0x10a00000 0x0 0x8000>;
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reg = <0x10a00000 0x8000>;
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#clock-cells = <1>;
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};
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usb32drd: phy@10aa0000 {
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compatible = "samsung,exynos2200-usb32drd-phy";
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reg = <0x0 0x10aa0000 0x0 0x10000>;
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reg = <0x10aa0000 0x10000>;
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clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>;
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clock-names = "phy";
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@ -360,7 +360,7 @@ usb32drd: phy@10aa0000 {
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usb_hsphy: phy@10ab0000 {
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compatible = "samsung,exynos2200-eusb2-phy";
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reg = <0x0 0x10ab0000 0x0 0x10000>;
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reg = <0x10ab0000 0x10000>;
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clocks = <&cmu_hsi0 CLK_MOUT_HSI0_USB32DRD>,
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<&cmu_hsi0 CLK_MOUT_HSI0_NOC>,
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@ -374,7 +374,7 @@ usb_hsphy: phy@10ab0000 {
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usb: usb@10b00000 {
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compatible = "samsung,exynos2200-dwusb3";
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ranges = <0x0 0x0 0x10b00000 0x10000>;
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ranges = <0x0 0x10b00000 0x10000>;
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clocks = <&cmu_hsi0 CLK_MOUT_HSI0_NOC>;
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clock-names = "link_aclk";
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@ -406,7 +406,7 @@ usb_dwc3: usb@0 {
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cmu_ufs: clock-controller@11000000 {
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compatible = "samsung,exynos2200-cmu-ufs";
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reg = <0x0 0x11000000 0x0 0x8000>;
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reg = <0x11000000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>,
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@ -418,27 +418,27 @@ cmu_ufs: clock-controller@11000000 {
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syscon_ufs: syscon@11020000 {
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compatible = "samsung,exynos2200-ufs-sysreg", "syscon";
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reg = <0x0 0x11020000 0x0 0x2000>;
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reg = <0x11020000 0x2000>;
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};
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pinctrl_ufs: pinctrl@11040000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x11040000 0x0 0x1000>;
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reg = <0x11040000 0x1000>;
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};
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pinctrl_hsi1ufs: pinctrl@11060000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x11060000 0x0 0x1000>;
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reg = <0x11060000 0x1000>;
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};
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pinctrl_hsi1: pinctrl@11240000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x11240000 0x0 0x1000>;
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reg = <0x11240000 0x1000>;
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};
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cmu_peric2: clock-controller@11c00000 {
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compatible = "samsung,exynos2200-cmu-peric2";
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reg = <0x0 0x11c00000 0x0 0x8000>;
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reg = <0x11c00000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>,
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@ -450,17 +450,17 @@ cmu_peric2: clock-controller@11c00000 {
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syscon_peric2: syscon@11c20000 {
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compatible = "samsung,exynos2200-peric2-sysreg", "syscon";
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reg = <0x0 0x11c20000 0x0 0x4000>;
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reg = <0x11c20000 0x4000>;
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};
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pinctrl_peric2: pinctrl@11c30000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x11c30000 0x0 0x1000>;
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reg = <0x11c30000 0x1000>;
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};
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cmu_cmgp: clock-controller@14e00000 {
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compatible = "samsung,exynos2200-cmu-cmgp";
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reg = <0x0 0x14e00000 0x0 0x8000>;
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reg = <0x14e00000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>,
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@ -471,12 +471,12 @@ cmu_cmgp: clock-controller@14e00000 {
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syscon_cmgp: syscon@14e20000 {
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compatible = "samsung,exynos2200-cmgp-sysreg", "syscon";
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reg = <0x0 0x14e20000 0x0 0x2000>;
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reg = <0x14e20000 0x2000>;
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};
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pinctrl_cmgp: pinctrl@14e30000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x14e30000 0x0 0x1000>;
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reg = <0x14e30000 0x1000>;
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wakeup-interrupt-controller {
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compatible = "samsung,exynos2200-wakeup-eint",
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@ -487,7 +487,7 @@ wakeup-interrupt-controller {
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cmu_vts: clock-controller@15300000 {
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compatible = "samsung,exynos2200-cmu-vts";
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reg = <0x0 0x15300000 0x0 0x8000>;
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reg = <0x15300000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>,
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@ -497,12 +497,12 @@ cmu_vts: clock-controller@15300000 {
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pinctrl_vts: pinctrl@15320000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x15320000 0x0 0x1000>;
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reg = <0x15320000 0x1000>;
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};
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cmu_alive: clock-controller@15800000 {
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compatible = "samsung,exynos2200-cmu-alive";
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reg = <0x0 0x15800000 0x0 0x8000>;
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reg = <0x15800000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>,
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@ -512,7 +512,7 @@ cmu_alive: clock-controller@15800000 {
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pinctrl_alive: pinctrl@15850000 {
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compatible = "samsung,exynos2200-pinctrl";
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reg = <0x0 0x15850000 0x0 0x1000>;
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reg = <0x15850000 0x1000>;
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wakeup-interrupt-controller {
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compatible = "samsung,exynos2200-wakeup-eint",
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@ -524,7 +524,7 @@ wakeup-interrupt-controller {
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pmu_system_controller: system-controller@15860000 {
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compatible = "samsung,exynos2200-pmu",
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"samsung,exynos7-pmu", "syscon";
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reg = <0x0 0x15860000 0x0 0x10000>;
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reg = <0x15860000 0x10000>;
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reboot: syscon-reboot {
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compatible = "syscon-reboot";
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@ -536,7 +536,7 @@ reboot: syscon-reboot {
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cmu_top: clock-controller@1a320000 {
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compatible = "samsung,exynos2200-cmu-top";
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reg = <0x0 0x1a320000 0x0 0x8000>;
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reg = <0x1a320000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>;
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