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drm/amd/pm: Add smu v15_0_8 message header
Add smu v15_0_8 message header v2: squash in updates (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v15_0_8_ppsmc.h
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drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v15_0_8_ppsmc.h
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/*
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* Copyright 2025 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef SMU_15_0_8_PPSMC_H
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#define SMU_15_0_8_PPSMC_H
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/* SMU Response Codes */
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#define PPSMC_Result_OK 0x1
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#define PPSMC_Result_Failed 0xFF
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#define PPSMC_Result_UnknownCmd 0xFE
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#define PPSMC_Result_CmdRejectedPrereq 0xFD
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#define PPSMC_Result_CmdRejectedBusy 0xFC
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/* Message Definitions */
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#define PPSMC_MSG_TestMessage 0x1
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#define PPSMC_MSG_GetSmuVersion 0x2
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#define PPSMC_MSG_GfxDriverReset 0x3
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#define PPSMC_MSG_GetDriverIfVersion 0x4
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#define PPSMC_MSG_EnableAllSmuFeatures 0x5
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#define PPSMC_MSG_GetMetricsVersion 0x6
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#define PPSMC_MSG_GetMetricsTable 0x7
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#define PPSMC_MSG_GetEnabledSmuFeatures 0x8
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#define PPSMC_MSG_SetDriverDramAddr 0x9 //ARG0: low address, ARG1: high address
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#define PPSMC_MSG_SetToolsDramAddr 0xA //ARG0: low address, ARG1: high address
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//#define PPSMC_MSG_SetSystemVirtualDramAddr 0xB
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#define PPSMC_MSG_SetSoftMaxByFreq 0xC
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#define PPSMC_MSG_SetPptLimit 0xD
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#define PPSMC_MSG_GetPptLimit 0xE
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#define PPSMC_MSG_DramLogSetDramAddr 0xF //ARG0: low address, ARG1: high address, ARG2: size
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#define PPSMC_MSG_HeavySBR 0x10
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#define PPSMC_MSG_DFCstateControl 0x11
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#define PPSMC_MSG_GfxDriverResetRecovery 0x12
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#define PPSMC_MSG_TriggerVFFLR 0x13
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#define PPSMC_MSG_SetSoftMinGfxClk 0x14
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#define PPSMC_MSG_SetSoftMaxGfxClk 0x15
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#define PPSMC_MSG_PrepareForDriverUnload 0x16
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#define PPSMC_MSG_QueryValidMcaCount 0x17
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#define PPSMC_MSG_McaBankDumpDW 0x18
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#define PPSMC_MSG_ClearMcaOnRead 0x19
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#define PPSMC_MSG_QueryValidMcaCeCount 0x1A
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#define PPSMC_MSG_McaBankCeDumpDW 0x1B
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#define PPSMC_MSG_SelectPLPDMode 0x1C
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#define PPSMC_MSG_SetThrottlingPolicy 0x1D
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#define PPSMC_MSG_ResetSDMA 0x1E
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#define PPSMC_MSG_GetRasTableVersion 0x1F
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#define PPSMC_MSG_GetRmaStatus 0x20
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#define PPSMC_MSG_GetBadPageCount 0x21
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#define PPSMC_MSG_GetBadPageMcaAddress 0x22
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#define PPSMC_MSG_GetBadPagePaAddress 0x23
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#define PPSMC_MSG_SetTimestamp 0x24
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#define PPSMC_MSG_GetTimestamp 0x25
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#define PPSMC_MSG_GetRasPolicy 0x26
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#define PPSMC_MSG_GetBadPageIpIdLoHi 0x27
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#define PPSMC_MSG_EraseRasTable 0x28
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#define PPSMC_MSG_GetStaticMetricsTable 0x29
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#define PPSMC_MSG_ResetVfArbitersByIndex 0x2A
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#define PPSMC_MSG_GetBadPageSeverity 0x2B
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#define PPSMC_MSG_GetSystemMetricsTable 0x2C
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#define PPSMC_MSG_GetSystemMetricsVersion 0x2D
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#define PPSMC_MSG_ResetVCN 0x2E
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#define PPSMC_MSG_SetFastPptLimit 0x2F
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#define PPSMC_MSG_GetFastPptLimit 0x30
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#define PPSMC_MSG_SetSoftMinGl2clk 0x31
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#define PPSMC_MSG_SetSoftMaxGl2clk 0x32
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#define PPSMC_MSG_SetSoftMinFclk 0x33
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#define PPSMC_MSG_SetSoftMaxFclk 0x34
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#define PPSMC_Message_Count 0x35
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/* PSMC Reset Types for driver msg argument */
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#define PPSMC_RESET_TYPE_DRIVER_MODE_1_RESET 0x1
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#define PPSMC_RESET_TYPE_DRIVER_MODE_2_RESET 0x2
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#define PPSMC_RESET_TYPE_DRIVER_MODE_3_RESET 0x3
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/* PLPD modes */
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#define PPSMC_PLPD_MODE_DEFAULT 0x1
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#define PPSMC_PLPD_MODE_OPTIMIZED 0x2
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typedef uint32_t PPSMC_Result;
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typedef uint32_t PPSMC_MSG;
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#endif
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