From ad3d90b0bad420085c681ff8bb6db6365982c6ae Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Mon, 2 May 2022 02:11:00 +0000 Subject: [PATCH] mfd: Add support for Maxim MAX96752F The MAX96752F/MAX96754F deserializers convert a single- or dual-link GMSL2 serial input to single or dual OLDI. They also send and receive side-channel and peripheral control data, enabling full-duplex, single wire, bidirectional transmission of video and data over 15 meter cables. Signed-off-by: Wyon Bi Change-Id: Ibac9f881bd832e96a8606b9f6492e80f8d2494c6 --- drivers/mfd/Kconfig | 9 ++ drivers/mfd/Makefile | 1 + drivers/mfd/max96752f.c | 194 ++++++++++++++++++++++++++++++++++ include/linux/mfd/max96752f.h | 106 +++++++++++++++++++ 4 files changed, 310 insertions(+) create mode 100644 drivers/mfd/max96752f.c create mode 100644 include/linux/mfd/max96752f.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index c8b1f6685d2a..b6ef2552a7b1 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -921,6 +921,15 @@ config MFD_MAX8998 additional drivers must be enabled in order to use the functionality of the device. +config MFD_MAX96752F + tristate "Maxim Semiconductor MAX96752F GMSL2 Deserializer Support" + depends on I2C + select MFD_CORE + select REGMAP_I2C + select I2C_MUX + help + Say yes here to add support for Maxim Semiconductor MAX96752F. + config MFD_MT6360 tristate "Mediatek MT6360 SubPMIC" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c1f49d9c373d..984a1f1ed59c 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -170,6 +170,7 @@ max8925-objs := max8925-core.o max8925-i2c.o obj-$(CONFIG_MFD_MAX8925) += max8925.o obj-$(CONFIG_MFD_MAX8997) += max8997.o max8997-irq.o obj-$(CONFIG_MFD_MAX8998) += max8998.o max8998-irq.o +obj-$(CONFIG_MFD_MAX96752F) += max96752f.o obj-$(CONFIG_MFD_MP2629) += mp2629.o diff --git a/drivers/mfd/max96752f.c b/drivers/mfd/max96752f.c new file mode 100644 index 000000000000..00bc47ea6100 --- /dev/null +++ b/drivers/mfd/max96752f.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Maxim MAX96752F MFD driver + * + * Copyright (C) 2022 Rockchip Electronics Co. Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static const struct mfd_cell max96752f_devs[] = { + { + .name = "max96752f-pinctrl", + .of_compatible = "maxim,max96752f-pinctrl", + }, { + .name = "max96752f-gpio", + .of_compatible = "maxim,max96752f-gpio", + }, { + .name = "max96752f-bridge", + .of_compatible = "maxim,max96752f-bridge", + }, +}; + +static int max96752f_select(struct i2c_mux_core *muxc, u32 chan) +{ + return 0; +} + +static bool max96752f_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case 0x0002: + case 0x0140: + case 0x01ce: + case 0x0203 ... 0x022f: + return false; + default: + return true; + } +} + +static const struct reg_default max96752f_reg_defaults[] = { + { 0x0002, 0x47 }, + { 0x0140, 0x21 }, + { 0x01ce, 0x06 }, + { 0x0203, 0x84 }, { 0x0204, 0xa1 }, { 0x0205, 0x41 }, + { 0x0206, 0x81 }, { 0x0207, 0xa2 }, { 0x0208, 0x42 }, + { 0x0209, 0x81 }, { 0x020a, 0xa3 }, { 0x020b, 0x43 }, + { 0x020c, 0x81 }, { 0x020d, 0xa4 }, { 0x020e, 0x44 }, + { 0x020f, 0x81 }, { 0x0210, 0xa5 }, { 0x0211, 0x45 }, + { 0x0212, 0x81 }, { 0x0213, 0xa6 }, { 0x0214, 0x46 }, + { 0x0215, 0x81 }, { 0x0216, 0xa7 }, { 0x0217, 0x47 }, + { 0x0218, 0x81 }, { 0x0219, 0xa8 }, { 0x021a, 0x48 }, + { 0x021b, 0x80 }, { 0x021c, 0xa9 }, { 0x021d, 0x49 }, + { 0x021e, 0x80 }, { 0x021f, 0xaa }, { 0x0220, 0x4a }, + { 0x0221, 0x80 }, { 0x0222, 0x2b }, { 0x0223, 0x4b }, + { 0x0224, 0x80 }, { 0x0225, 0x2c }, { 0x0226, 0x4c }, + { 0x0227, 0x80 }, { 0x0228, 0x2d }, { 0x0229, 0x4d }, + { 0x022a, 0x18 }, { 0x022b, 0x4e }, { 0x022c, 0x4e }, + { 0x022d, 0x18 }, { 0x022e, 0x4f }, { 0x022f, 0x4f }, +}; + +static const struct regmap_config max96752f_regmap_config = { + .name = "max96752f", + .reg_bits = 16, + .val_bits = 8, + .max_register = 0x25d, + .volatile_reg = max96752f_volatile_reg, + .reg_defaults = max96752f_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(max96752f_reg_defaults), + .cache_type = REGCACHE_RBTREE, + .use_single_write = true, +}; + +static const unsigned short addr_list[] = { + 0x48, 0x4a, 0x4c, 0x68, 0x6a, 0x6c, 0x28, 0x2a, I2C_CLIENT_END +}; + +void max96752f_regcache_sync(struct max96752f *max96752f) +{ + struct i2c_client *client = max96752f->client; + u16 addr = client->addr; + u32 id; + int i, ret; + + regcache_cache_only(max96752f->regmap, false); + + for (i = 0; addr_list[i] != I2C_CLIENT_END; i++) { + client->addr = addr_list[i]; + ret = regmap_read(max96752f->regmap, 0x000d, &id); + if (ret < 0) + continue; + + if (id == 0x82) { + regmap_write(max96752f->regmap, 0x0000, addr << 1); + break; + } + } + + client->addr = addr; + + regcache_sync(max96752f->regmap); +} +EXPORT_SYMBOL(max96752f_regcache_sync); + +static int max96752f_i2c_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct device_node *child; + struct max96752f *max96752f; + unsigned int nr = 0; + int ret; + + for_each_available_child_of_node(dev->of_node, child) { + if (!of_find_property(child, "reg", NULL)) + continue; + + nr++; + } + + max96752f = devm_kzalloc(dev, sizeof(*max96752f), GFP_KERNEL); + if (!max96752f) + return -ENOMEM; + + max96752f->muxc = i2c_mux_alloc(client->adapter, dev, nr, 0, + I2C_MUX_LOCKED, max96752f_select, NULL); + if (!max96752f->muxc) + return -ENOMEM; + + max96752f->dev = dev; + max96752f->client = client; + i2c_set_clientdata(client, max96752f); + + max96752f->regmap = devm_regmap_init_i2c(client, + &max96752f_regmap_config); + if (IS_ERR(max96752f->regmap)) + return dev_err_probe(dev, PTR_ERR(max96752f->regmap), + "failed to initialize regmap\n"); + + regcache_cache_only(max96752f->regmap, true); + + ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, max96752f_devs, + ARRAY_SIZE(max96752f_devs), NULL, 0, NULL); + if (ret) + return ret; + + for_each_available_child_of_node(dev->of_node, child) { + if (of_property_read_u32(child, "reg", &nr)) + continue; + + ret = i2c_mux_add_adapter(max96752f->muxc, 0, nr, 0); + if (ret) { + i2c_mux_del_adapters(max96752f->muxc); + return ret; + } + } + + return 0; +} + +static void max96752f_i2c_shutdown(struct i2c_client *client) +{ + struct max96752f *max96752f = i2c_get_clientdata(client); + + regmap_update_bits(max96752f->regmap, 0x0010, RESET_ALL, + FIELD_PREP(RESET_ALL, 1)); +} + +static const struct of_device_id max96752f_of_match[] = { + { .compatible = "maxim,max96752f", }, + {} +}; +MODULE_DEVICE_TABLE(of, max96752f_of_match); + +static struct i2c_driver max96752f_i2c_driver = { + .driver = { + .name = "max96752f", + .of_match_table = of_match_ptr(max96752f_of_match), + }, + .probe_new = max96752f_i2c_probe, + .shutdown = max96752f_i2c_shutdown, +}; + +module_i2c_driver(max96752f_i2c_driver); + +MODULE_AUTHOR("Wyon Bi "); +MODULE_DESCRIPTION("Maxim MAX96752F MFD driver"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/mfd/max96752f.h b/include/linux/mfd/max96752f.h new file mode 100644 index 000000000000..35867985fa2e --- /dev/null +++ b/include/linux/mfd/max96752f.h @@ -0,0 +1,106 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Defining registers address and its bit definitions of MAX96752F + * + * Copyright (c) 2022 Rockchip Electronics Co. Ltd. + */ + +#ifndef _MFD_MAX96752F_H_ +#define _MFD_MAX96752F_H_ + +#include + +#define GPIO_A_REG(gpio) (0x0200 + ((gpio) * 3)) +#define GPIO_B_REG(gpio) (0x0201 + ((gpio) * 3)) +#define GPIO_C_REG(gpio) (0x0202 + ((gpio) * 3)) +#define OLDI_REG(x) (0x01cd + (x)) + +/* 0000h */ +#define DEV_ADDR GENMASK(7, 1) +#define CFG_BLOCK BIT(0) + +/* 0001h */ +#define LVDS_HALFSW BIT(7) +#define IIC_2_EN BIT(5) +#define IIC_1_EN BIT(4) +#define TX_RATE GENMASK(3, 2) +#define RX_RATE GENMASK(1, 0) + +/* 0002h */ +#define LOCK_CFG BIT(7) +#define VID_EN BIT(6) +#define DIS_LOCAL_CC BIT(5) +#define DIS_REM_CC BIT(4) +#define AUD_TX_EN BIT(2) + +/* 0003h */ +#define GMSL2 BIT(5) +#define I2CSEL BIT(4) +#define UART_2_EN BIT(3) +#define UART_1_EN BIT(2) +#define VIDEO_LOCK BIT(0) + +/* 000Dh */ +#define DEV_ID GENMASK(7, 0) + +/* 000Eh */ +#define DEV_REV GENMASK(3, 0) + +/* 0010h */ +#define RESET_ALL BIT(7) +#define RESET_LINK BIT(6) +#define RESET_ONESHOT BIT(5) +#define AUTO_LINK BIT(4) +#define SLEEP BIT(3) +#define LINK_CFG GENMASK(1, 0) + +/* 0108h */ +#define VID_LOCK BIT(6) + +/* 0140h */ +#define AUD_RX_EN BIT(0) + +/* 01CEh */ +#define OLDI_OUTSEL BIT(7) +#define OLDI_FORMAT BIT(6) +#define OLDI_4TH_LANE BIT(5) +#define OLDI_SWAP_AB BIT(4) +#define OLDI_SPL_EN BIT(3) +#define OLDI_SPL_MODE GENMASK(2, 1) +#define OLDI_SPL_POL BIT(0) + +/* 01CFh */ +#define PD_LVDS_B BIT(7) +#define PD_LVDS_A BIT(6) +#define OLDI_DUP BIT(1) +#define SSEN BIT(0) + +/* 0200h */ +#define RES_CFG BIT(7) +#define TX_PRIO BIT(6) +#define TX_COMP_EN BIT(5) +#define GPIO_OUT BIT(4) +#define GPIO_IN BIT(3) +#define GPIO_RX_EN BIT(2) +#define GPIO_TX_EN BIT(1) +#define GPIO_OUT_DIS BIT(0) + +/* 0201h */ +#define PULL_UPDN_SEL GENMASK(7, 6) +#define OUT_TYPE BIT(5) +#define GPIO_TX_ID GENMASK(4, 0) + +/* 0202h */ +#define OVR_RES_CFG BIT(7) +#define GPIO_RX_ID GENMASK(4, 0) + +struct max96752f { + struct device *dev; + struct regmap *regmap; + struct i2c_client *client; + struct i2c_mux_core *muxc; +}; + +void max96752f_regcache_sync(struct max96752f *max96752f); + +#endif /* _MFD_MAX96752F_H_ */