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Bluetooth: btintel: Add Bluetooth SAR revision 2 support
BRDS revision 2 introduces per-chain (Chain A and Chain B) TX power
limits across five sub-bands (2.4G, 5.2G, 5.8/5.9G, 6G-low, 6G-high),
replacing the single-chain per-modulation model of revisions 0 and 1.
- Add btintel_set_sar_rev2() which sends the full Rev2 DDC sequence:
0x019e inc-power-mode enable flag (1 byte)
0x0311 2.4 GHz sub-band limits (2 bytes)
0x0312 5.2 GHz sub-band limits (2 bytes)
0x0313 5.8/5.9 GHz sub-band limits (2 bytes)
0x0314 5.8/5.9 GHz sub-band limits again (2 bytes, duplicate FW reg)
0x0315 6 GHz low sub-band limits (2 bytes)
0x0316 6 GHz high sub-band limits (2 bytes)
followed by the SAR-init-complete command (0xfe25).
logs from dmesg when BTSAR2 is enabled in Coreboot/BIOS:
Bluetooth: hci0: BT SAR Rev2: revision=2 bt_sar_bios=1 inc_power_mode=1
Bluetooth: hci0: BT SAR Rev2 Chain A: 2g4=76 5g2=0 5g8_5g9=0 6g1=0 6g3=0
Bluetooth: hci0: BT SAR Rev2 Chain B: 2g4=102 5g2=0 5g8_5g9=0 6g1=0 6g3=0
Signed-off-by: Ravindra <ravindra@intel.com>
Signed-off-by: Kiran K <kiran.k@intel.com>
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This commit is contained in:
Kiran K
Luiz Augusto von Dentz
parent
19129d7037
commit
ad28b52441
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@ -51,6 +51,7 @@ enum {
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#define BTINTEL_BT_DOMAIN 0x12
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#define BTINTEL_SAR_LEGACY 0
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#define BTINTEL_SAR_INC_PWR 1
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#define BTINTEL_SAR_REV2 2
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#define BTINTEL_SAR_INC_PWR_SUPPORTED 0
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#define CMD_WRITE_BOOT_PARAMS 0xfc0e
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@ -3102,6 +3103,111 @@ static int btintel_set_mutual_sar(struct hci_dev *hdev, struct btintel_sar_inc_p
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return 0;
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}
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/* btintel_send_sar_rev2_band - send DDC command for one Rev2 sub-band
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*
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* Each DDC 0x0311-0x0316 carries 2 bytes: [ChainA_value, ChainB_value].
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* cmd->len = 4 (2 id + 2 data)
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* HCI total = 5 bytes (1 len + 4)
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*/
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static int btintel_send_sar_rev2_band(struct hci_dev *hdev,
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struct btintel_cp_ddc_write *cmd,
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u16 id, u8 chain_a, u8 chain_b)
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{
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cmd->len = 4;
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cmd->id = cpu_to_le16(id);
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cmd->data[0] = chain_a;
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cmd->data[1] = chain_b;
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return btintel_send_sar_ddc(hdev, cmd, 5);
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}
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static int btintel_set_sar_rev2(struct hci_dev *hdev,
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struct btintel_sar_rev2 *sar)
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{
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struct btintel_cp_ddc_write *cmd;
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struct sk_buff *skb;
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u8 buffer[64];
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u8 enable;
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int ret;
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cmd = (void *)buffer;
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/* DDC 0x019e: enable/disable increased power mode SAR (1 byte) */
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cmd->len = 3;
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cmd->id = cpu_to_le16(0x019e);
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cmd->data[0] = (sar->inc_power_mode == BTINTEL_SAR_INC_PWR_SUPPORTED) ?
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0x01 : 0x00;
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ret = btintel_send_sar_ddc(hdev, cmd, 4);
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if (ret)
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return ret;
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/* DDC 0x0311-0x0316: per sub-band ChainA + ChainB limits */
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ret = btintel_send_sar_rev2_band(hdev, cmd, 0x0311,
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sar->chain_a.subband_2g4,
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sar->chain_b.subband_2g4);
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if (ret)
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return ret;
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ret = btintel_send_sar_rev2_band(hdev, cmd, 0x0312,
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sar->chain_a.subband_5g2,
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sar->chain_b.subband_5g2);
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if (ret)
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return ret;
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/* 0x0313 and 0x0314 both carry the 5G8/5G9 value */
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ret = btintel_send_sar_rev2_band(hdev, cmd, 0x0313,
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sar->chain_a.subband_5g8_5g9,
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sar->chain_b.subband_5g8_5g9);
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if (ret)
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return ret;
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ret = btintel_send_sar_rev2_band(hdev, cmd, 0x0314,
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sar->chain_a.subband_5g8_5g9,
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sar->chain_b.subband_5g8_5g9);
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if (ret)
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return ret;
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ret = btintel_send_sar_rev2_band(hdev, cmd, 0x0315,
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sar->chain_a.subband_6g1,
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sar->chain_b.subband_6g1);
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if (ret)
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return ret;
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ret = btintel_send_sar_rev2_band(hdev, cmd, 0x0316,
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sar->chain_a.subband_6g3,
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sar->chain_b.subband_6g3);
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if (ret)
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return ret;
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/* Notify firmware that SAR initialisation is complete */
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enable = 0x01;
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skb = __hci_cmd_sync(hdev, 0xfe25, sizeof(enable), &enable, HCI_CMD_TIMEOUT);
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if (IS_ERR(skb)) {
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bt_dev_warn(hdev, "Failed to send Intel SAR Rev2 Enable (%ld)",
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PTR_ERR(skb));
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return PTR_ERR(skb);
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}
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kfree_skb(skb);
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return 0;
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}
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static int btintel_sar_rev2_send_to_device(struct hci_dev *hdev,
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struct btintel_sar_rev2 *sar,
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struct intel_version_tlv *ver)
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{
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u16 cnvi = ver->cnvi_top & 0xfff;
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u16 cnvr = ver->cnvr_top & 0xfff;
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if (cnvi < BTINTEL_CNVI_BLAZARI || cnvr != BTINTEL_CNVR_WHP2) {
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bt_dev_dbg(hdev, "BT SAR Rev2 not supported on this platform (cnvi=0x%x cnvr=0x%x)",
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cnvi, cnvr);
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return -EOPNOTSUPP;
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}
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bt_dev_info(hdev, "Applying Bluetooth SAR Rev2");
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return btintel_set_sar_rev2(hdev, sar);
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}
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static int btintel_sar_send_to_device(struct hci_dev *hdev, struct btintel_sar_inc_pwr *sar,
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struct intel_version_tlv *ver)
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{
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@ -3128,6 +3234,7 @@ static int btintel_acpi_set_sar(struct hci_dev *hdev, struct intel_version_tlv *
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{
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union acpi_object *bt_pkg, *buffer = NULL;
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struct btintel_sar_inc_pwr sar;
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struct btintel_sar_rev2 sar_rev2;
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acpi_status status;
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u8 revision;
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int ret;
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@ -3148,14 +3255,96 @@ static int btintel_acpi_set_sar(struct hci_dev *hdev, struct intel_version_tlv *
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goto error;
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}
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if (buffer->package.elements[0].type != ACPI_TYPE_INTEGER) {
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bt_dev_warn(hdev, "BT_SAR: unexpected ACPI type for revision field");
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ret = -EINVAL;
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goto error;
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}
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revision = buffer->package.elements[0].integer.value;
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if (revision > BTINTEL_SAR_INC_PWR) {
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if (revision > BTINTEL_SAR_REV2) {
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bt_dev_dbg(hdev, "BT_SAR: revision: 0x%2.2x not supported", revision);
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ret = -EOPNOTSUPP;
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goto error;
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}
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if (revision == BTINTEL_SAR_REV2 && bt_pkg->package.count == 13) {
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/* Element layout: 0 = domain ID (BTINTEL_BT_DOMAIN, 0x12),
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* 1 = bt_sar_bios (u32), 2 = inc_power_mode (u32),
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* 3..12 = per-chain sub-band limits (u8 each).
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*/
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static const u64 rev2_max[13] = {
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U8_MAX, /* domain ID */
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U32_MAX, U32_MAX, /* bt_sar_bios, inc_power_mode */
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U8_MAX, U8_MAX, U8_MAX, U8_MAX, U8_MAX, /* chain A */
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U8_MAX, U8_MAX, U8_MAX, U8_MAX, U8_MAX, /* chain B */
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};
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union acpi_object *e;
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int i;
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for (i = 0; i < 13; i++) {
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e = &bt_pkg->package.elements[i];
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if (e->type != ACPI_TYPE_INTEGER) {
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bt_dev_warn(hdev, "BT SAR Rev2: unexpected ACPI type at element %d",
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i);
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ret = -EINVAL;
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goto error;
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}
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if (e->integer.value > rev2_max[i]) {
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bt_dev_warn(hdev, "BT SAR Rev2: element %d value 0x%llx out of range",
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i, e->integer.value);
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ret = -ERANGE;
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goto error;
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}
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}
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memset(&sar_rev2, 0, sizeof(sar_rev2));
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sar_rev2.revision = revision;
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sar_rev2.bt_sar_bios = bt_pkg->package.elements[1].integer.value;
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if (sar_rev2.bt_sar_bios != 1) {
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bt_dev_warn(hdev, "Bluetooth SAR Rev2 is not enabled");
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ret = -EOPNOTSUPP;
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goto error;
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}
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sar_rev2.inc_power_mode = bt_pkg->package.elements[2].integer.value;
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sar_rev2.chain_a.subband_2g4 = bt_pkg->package.elements[3].integer.value;
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sar_rev2.chain_a.subband_5g2 = bt_pkg->package.elements[4].integer.value;
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sar_rev2.chain_a.subband_5g8_5g9 = bt_pkg->package.elements[5].integer.value;
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sar_rev2.chain_a.subband_6g1 = bt_pkg->package.elements[6].integer.value;
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sar_rev2.chain_a.subband_6g3 = bt_pkg->package.elements[7].integer.value;
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sar_rev2.chain_b.subband_2g4 = bt_pkg->package.elements[8].integer.value;
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sar_rev2.chain_b.subband_5g2 = bt_pkg->package.elements[9].integer.value;
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sar_rev2.chain_b.subband_5g8_5g9 = bt_pkg->package.elements[10].integer.value;
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sar_rev2.chain_b.subband_6g1 = bt_pkg->package.elements[11].integer.value;
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sar_rev2.chain_b.subband_6g3 = bt_pkg->package.elements[12].integer.value;
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bt_dev_dbg(hdev, "BT SAR Rev2: revision=%u bt_sar_bios=%u inc_power_mode=%u",
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sar_rev2.revision, sar_rev2.bt_sar_bios, sar_rev2.inc_power_mode);
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bt_dev_dbg(hdev, "BT SAR Rev2 Chain A: 2g4=%u 5g2=%u 5g8_5g9=%u 6g1=%u 6g3=%u",
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sar_rev2.chain_a.subband_2g4, sar_rev2.chain_a.subband_5g2,
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sar_rev2.chain_a.subband_5g8_5g9, sar_rev2.chain_a.subband_6g1,
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sar_rev2.chain_a.subband_6g3);
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bt_dev_dbg(hdev, "BT SAR Rev2 Chain B: 2g4=%u 5g2=%u 5g8_5g9=%u 6g1=%u 6g3=%u",
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sar_rev2.chain_b.subband_2g4, sar_rev2.chain_b.subband_5g2,
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sar_rev2.chain_b.subband_5g8_5g9, sar_rev2.chain_b.subband_6g1,
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sar_rev2.chain_b.subband_6g3);
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ret = btintel_sar_rev2_send_to_device(hdev, &sar_rev2, ver);
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goto error;
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}
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if (revision == BTINTEL_SAR_REV2) {
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bt_dev_warn(hdev, "BT SAR Rev2: unexpected ACPI package count %d (expected 13)",
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bt_pkg->package.count);
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ret = -EINVAL;
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goto error;
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}
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memset(&sar, 0, sizeof(sar));
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if (revision == BTINTEL_SAR_LEGACY && bt_pkg->package.count == 8) {
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@ -65,6 +65,7 @@ struct intel_tlv {
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/* CNVR */
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#define BTINTEL_CNVR_FMP2 0x910
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#define BTINTEL_CNVR_WHP2 0xA10 /* Whale Peak2 - Panther Lake */
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#define BTINTEL_IMG_BOOTLOADER 0x01 /* Bootloader image */
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#define BTINTEL_IMG_IML 0x02 /* Intermediate image */
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@ -204,6 +205,23 @@ struct btintel_sar_inc_pwr {
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u8 le_lr;
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};
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/* Bluetooth SAR feature (BRDS), Revision 2 - per-chain sub-band power limits */
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struct btintel_sar_band_limits {
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u8 subband_2g4;
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u8 subband_5g2;
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u8 subband_5g8_5g9;
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u8 subband_6g1;
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u8 subband_6g3;
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};
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struct btintel_sar_rev2 {
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u8 revision;
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u32 bt_sar_bios; /* 1: BIOS-managed SAR enabled */
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u32 inc_power_mode; /* 0: supported, 1: disabled */
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struct btintel_sar_band_limits chain_a;
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struct btintel_sar_band_limits chain_b;
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};
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#define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8))
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#define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16))
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#define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff)
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