arm64: dts: exynos990: Enable watchdog timer

Enable the two watchdog timer clusters (cl0, cl2) present
on the Exynos990 SoC.

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
Link: https://lore.kernel.org/r/20250710-resends-july-exynos990-dt-v2-1-55033f73d1b0@mentallysanemainliners.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Igor Belwon 2025-07-10 18:50:05 +02:00 committed by Krzysztof Kozlowski
parent 3b745d0b3d
commit ad211501ff

View File

@ -211,6 +211,30 @@ timer@10040000 {
<GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
};
watchdog_cl0: watchdog@10050000 {
compatible = "samsung,exynos990-wdt";
reg = <0x10050000 0x100>;
interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_peris CLK_GOUT_PERIS_WDT_CLUSTER0_PCLK>,
<&oscclk>;
clock-names = "watchdog",
"watchdog_src";
samsung,syscon-phandle = <&pmu_system_controller>;
samsung,cluster-index = <0>;
};
watchdog_cl2: watchdog@10060000 {
compatible = "samsung,exynos990-wdt";
reg = <0x10060000 0x100>;
interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cmu_peris CLK_GOUT_PERIS_WDT_CLUSTER2_PCLK>,
<&oscclk>;
clock-names = "watchdog",
"watchdog_src";
samsung,syscon-phandle = <&pmu_system_controller>;
samsung,cluster-index = <2>;
};
gic: interrupt-controller@10101000 {
compatible = "arm,gic-400";
reg = <0x10101000 0x1000>,