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drm/i915/gmbus: s/gmbus_pins_bdw/gmbus_pins_lpt/

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The GMBUS pin pair <-> GPIO mapping is purely a property
of the PCH (on the platforms where GMBUS lives in the PCH).
So rename gmbus_pins_bdw[] to gmbus_pins_lpt[] and extend
it to cover all platforms with LPT/WPT PCHs.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260623125111.6632-3-ville.syrjala@linux.intel.com
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
This commit is contained in:
Ville Syrjälä 2026-06-23 15:51:07 +03:00
parent ba3b58d2c9
commit ace3774277
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/i915/display/intel_gmbus.c
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@ -86,7 +86,7 @@ static const struct gmbus_pin gmbus_pins[] = {
[GMBUS_PIN_DPD] = { "dpd", GPIO_5 },
};
static const struct gmbus_pin gmbus_pins_bdw[] = {
static const struct gmbus_pin gmbus_pins_lpt[] = {
[GMBUS_PIN_VGADDC] = { "vga", GPIO_0 },
[GMBUS_PIN_DPC] = { "dpc", GPIO_3 },
[GMBUS_PIN_DPB] = { "dpb", GPIO_4 },
@ -178,9 +178,9 @@ static const struct gmbus_pin *get_gmbus_pin(struct intel_display *display,
} else if (DISPLAY_VER(display) == 9) {
pins = gmbus_pins_skl;
size = ARRAY_SIZE(gmbus_pins_skl);
} else if (display->platform.broadwell) {
pins = gmbus_pins_bdw;
size = ARRAY_SIZE(gmbus_pins_bdw);
} else if (HAS_PCH_LPT(display)) {
pins = gmbus_pins_lpt;
size = ARRAY_SIZE(gmbus_pins_lpt);
} else {
pins = gmbus_pins;
size = ARRAY_SIZE(gmbus_pins);